STx25NM50N
N-channel 500 V, 0.11
Ω,
22 A MDmesh™ II Power MOSFET
TO-220, TO-220FP, I
2
PAK, D
2
PAK, TO-247
Features
Type
STB25NM50N
STB25NM50N-1
STF25NM50N
STP25NM50N
STW25NM50N
V
DSS
(@Tjmax)
550 V
550 V
550 V
550 V
550 V
R
DS(on)
max
< 0.140
Ω
< 0.140
Ω
< 0.140
Ω
< 0.140
Ω
< 0.140
Ω
I
D
3
3
22 A
22 A
22 A
(1)
22 A
22 A
TO-220FP
3
1
1
2
TO-220
1. Limited only by maximum temperature allowed
■
■
■
100% avalanche tested
Low input capacitance and gate charge
Low gate input resistance
I²PAK
Application
■
Switching applications
Description
bs
O
This series of devices is realized with the second
generation of MDmesh™ Technology. This
revolutionary MOSFET associates a new vertical
structure to the Company’s strip layout to yield
one of the world’s lowest on-resistance and gate
charge. It is therefore suitable for the most
demanding high efficiency converters.
et
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Figure 1.
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3
12
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P
D²PAK
uc
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t(
1
2
2
1
3
TO-247
Internal schematic diagram
Table 1.
Device summary
Marking
B25NM50N
B25NM50N
F25NM50N
P25NM50N
W25NM50N
Package
D
2
PAK
I
2
PAK
TO-220FP
TO-220
TO-247
Packaging
Tape and reel
Tube
Tube
Tube
Tube
Order codes
STB25NM50N
STB25NM50N-1
STF25NM50N
STP25NM50N
STW25NM50N
November 2008
Rev 13
1/18
www.st.com
18
Contents
STx25NM50N
Contents
1
2
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
............................. 6
3
4
5
6
Test circuit
................................................ 9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
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2/18
STx25NM50N
Electrical ratings
1
Electrical ratings
Table 2.
Symbol
Absolute maximum ratings
Value
Parameter
TO-220, I²PAK
TO-220FP
D²PAK, TO-247
500
±25
22
14
88
22
(1)
Unit
V
DS
V
GS
I
D
I
D
I
DM (2)
P
TOT
Drain-source voltage (V
GS
= 0)
Gate- source voltage
Drain current (continuous) at T
C
= 25 °C
Drain current (continuous) at T
C
= 100 °C
Drain current (pulsed)
Total dissipation at T
C
= 25 °C
Derating factor
V
V
V
ISO
dv/dt
(3)
T
stg
T
j
Insulation withstand voltage (RMS) from all three
leads to external heat sink (t=1 s;T
C
=25 °C)
Peak diode recovery voltage slope
Storage temperature
Max. operating junction temperature
1. Limited only by maximum temperature allowed
2. Pulse width limited by safe operating area
3. I
SD
≤
22 A, di/dt
≤
400 A/µs, V
DD
= 80% V
(BR)DSS
Table 3.
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Symbol
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P
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T
l
Thermal data
Value
Parameter
TO-220, I²PAK
TO-220FP
D²PAK, TO-247
0.78
62.5
300
3.1
Unit
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b
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1.28
--
160
d
o
15
150
ct
u
40
0.32
14
(1)
88
(1)
s)
(
A
A
A
W
W/°C
V
V/ns
°C
°C
2500
–55 to 150
R
thj-case
R
thj-amb
Thermal resistance junction-case max
Thermal resistance junction-ambient max
Maximum lead temperature for soldering
purpose
°C/W
°C/W
°C
Table 4.
Symbol
I
AR
E
AS
Avalanche characteristics
Parameter
Avalanche current, repetitive or not-repetitive
(pulse width limited by Tj Max)
Single pulse avalanche energy
(starting Tj = 25 °C, I
D
= I
AR
, V
DD
= 50 V)
Value
10
350
Unit
A
mJ
3/18
Electrical characteristics
STx25NM50N
2
Electrical characteristics
(T
CASE
=25°C unless otherwise specified)
Table 5.
Symbol
V
(BR)DSS
dv/dt
(1)
I
DSS
I
GSS
V
GS(th)
R
DS(on)
On/off states
Parameter
Drain-source
breakdown voltage
Drain source voltage slope
Zero gate voltage
drain current (V
GS
= 0)
Gate-body leakage
current (V
DS
= 0)
Gate threshold voltage
Static drain-source on
resistance
Test conditions
I
D
= 1 mA, V
GS
= 0
V
DD
= 400 V, I
D
= 25 A,
V
GS
= 10 V
V
DS
= Max rating
V
DS
= Max rating, @125 °C
V
GS
= ± 20 V
V
DS
= V
GS
, I
D
= 250 µA
V
GS
= 10 V, I
D
= 11 A
Min.
500
44
Typ.
Max. Unit
V
V/ns
µA
µA
nA
V
Ω
1. Characteristic value at turn off on inductive load
Table 6.
Symbol
g
fs (1)
C
iss
C
oss
C
rss
Dynamic
Parameter
Forward transconductance
Input capacitance
Output capacitance
Reverse transfer
capacitance
Equivalent output
capacitance
Total gate charge
Gate-source charge
Gate-drain charge
Gate input resistance
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so
C
oss eq. (2)
Q
g
Q
gs
Q
gd
R
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s)
t(
1
10
100
4
0.110 0.140
Test conditions
Min.
Typ.
19
2565
511
77
315
84
11
35
1.6
Max. Unit
S
pF
pF
pF
V
DS
=15 V
,
I
D
= 11 A
V
DS
= 25 V, f = 1 MHz,
V
GS
= 0
V
GS
= 0, V
DS
= 0 to 400 V
V
DD
= 400 V, I
D
= 22 A,
V
GS
= 10 V,
(see Figure 19)
f=1 MHz Gate DC Bias=0
Test signal level=20 mV
open drain
pF
nC
nC
nC
Ω
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
2. C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0 to 80% V
DS
4/18
STx25NM50N
Electrical characteristics
Table 7.
Symbol
t
d(on)
t
r
t
d(off)
t
f
Switching times
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
V
DD
= 250 V, I
D
= 11 A
R
G
= 4.7
Ω
V
GS
= 10 V
(see Figure 18)
Min.
Typ. Max. Unit
23
23
75
22
ns
ns
ns
ns
Table 8.
Symbol
I
SD
I
SDM
(1)
Source drain diode
Parameter
Source-drain current
Source-drain current (pulsed)
Forward on voltage
Reverse recovery time
Reverse recovery charge
Reverse recovery current
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
= 22 A, V
GS
= 0
I
SD
= 22 A, di/dt = 100 A/µs
V
DD
= 100 V
(see Figure 23)
I
SD
= 22 A, di/dt = 100 A/µs
V
DD
= 100 V, T
j
= 150 °C
(see Figure 23)
Test conditions
Min
Typ.
Max
22
88
Unit
A
A
V
SD (2)
t
rr
Q
rr
I
RRM
t
rr
Q
rr
I
RRM
1. Pulse width limited by safe operating area
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
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460
6.9
30
ct
u
1.3
s)
(
V
ns
µC
A
ns
µC
A
532
8.25
31
5/18
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