MT55L256V18F1B-11 datasheet, PDF

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MT55L256V18F1B-11: DescriptionZBT SRAM, 256KX18, 8.5ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, MS-028BHA, BGA-119; Categorystorage storage; File Size270KB，31 Pages; ManufacturerCypress Semiconductor

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MT55L256V18F1B-11 Overview

ZBT SRAM, 256KX18, 8.5ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, MS-028BHA, BGA-119

MT55L256V18F1B-11 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Cypress Semiconductor
Parts packaging code	BGA
package instruction	BGA,
Contacts	119
Reach Compliance Code	not_compliant
ECCN code	3A991.B.2.A
Maximum access time	8.5 ns
JESD-30 code	R-PBGA-B119
JESD-609 code	e0
length	22 mm
memory density	4718592 bit
Memory IC Type	ZBT SRAM
memory width	18
Number of functions	1
Number of terminals	119
word count	262144 words
character code	256000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	256KX18
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Package shape	RECTANGULAR
Package form	GRID ARRAY
Parallel/Serial	PARALLEL
Certification status	Not Qualified
Maximum seat height	2.4 mm
Maximum supply voltage (Vsup)	3.465 V
Minimum supply voltage (Vsup)	3.135 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	BALL
Terminal pitch	1.27 mm
Terminal location	BOTTOM
width	14 mm

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4Mb: 256K x 18, 128K x 32/36

FLOW-THROUGH ZBT SRAM

4Mb

ZBT

SRAM

FEATURES

•

High frequency and 100 percent bus utilization

Fast cycle times: 10ns, 11ns, and 12ns

Single +3.3V ±5% power supply (V

)

Separate +3.3V or +2.5V isolated output buffer

supply (V

Advanced control logic for minimum control

signal interface

Individual BYTE WRITE controls may be tied LOW

Single R/W# (read/write) control pin

CKE# pin to enable clock and suspend operations

Three chip enables for simple depth expansion

Clock-controlled and registered addresses, data

I/Os and control signals

Internally self-timed, fully coherent WRITE

Internally self-timed, registered outputs to

eliminate the need to control OE#

SNOOZE MODE for reduced-power standby

Common data inputs and data outputs

Linear or interleaved burst modes

Burst feature (optional)

Pin/function compatibility with 2Mb, 8Mb, and

16Mb ZBT SRAM family

165-pin FBGA package

100-pin TSOP package

119-pin BGA package

Automatic power-down

MT55L256L18F1, MT55L128L32F1,

MT55L128L36F1; MT55L256V18F1,

MT55L128V32F1, MT55L128V36F1

3.3V V

, 3.3V or 2.5V I/O

100-Pin TQFP

165-Pin FBGA

(Preliminary Package Data)

OPTIONS

• Timing (Access/Cycle/MHz)

7.5ns/10ns/100 MHz

8.5ns/11ns/90 MHz

9ns/12ns/83 MHz

• Configurations

3.3V I/O

256K x 18

128K x 32

128K x 36

2.5V I/O

256K x 18

128K x 32

128K x 36

• Package

100-pin TQFP

165-pin FBGA

119-pin, 14mm x 22mm BGA

• Operating Temperature Range

Commercial (0°C to +70°C)

Industrial (-40°C to +85°C)**

Part Number Example:

MARKING

-10

-11

-12

MT55L256L18F1

MT55L128L32F1

MT55L128L36F1

MT55L256V18F1

MT55L128V32F1

MT55L128V36F1

None

NOTE:

1. JEDEC-standard MS-026 BHA (LQFP).

2. JEDEC-standard MS-028 BHA (PBGA).

119-Pin BGA

MT55L256L18F1T-12

4Mb: 256K x 18, 128K x 32/36 Flow-Through ZBT SRAM

MT55L256L18F1_D.p65 – Rev.10/01

* A Part Marking Guide for the FBGA devices can be found on Micron’s

Web site—http://www.micron.com/support/index.html.

** Industrial temperature range offered in specific speed grades and

configurations. Contact factory for more information.

Micron Technology, Inc., reserves the right to change products or specifications without notice.

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