iC-NV
6-BIT Sin/D FLASH CONVERTER
Rev C1, Page 1/19
FEATURES
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Fast flash converter
Integrated glitch filter; minimum transition distance can be set
using the optional resistor
Selectable resolution of up to 64 steps per cycle and up to
16-fold interpolation
Integrated instrumentation amplifiers with adjustable gain
Direct connection of sensor bridges, no external components
required
200kHz input frequency with the highest resolution
Incremental A QUAD B output of up to 3.2MHz
Reversed A/B phase selectable
Index signal processing
Sensor bridge calibration supportable by analog/digital test
signals
Low power consumption from single 5V supply
TTL- /CMOS-compatible outputs
Inputs and outputs protected against destruction by ESD
APPLICATIONS
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Angle interpolation from ortho-
gonal sinusoidal input signals
Linear and rotary encoders
MR sensor systems
PACKAGES
TSSOP20
BLOCK DIAGRAM
Copyright © 2007, iC-Haus
www.ichaus.com
iC-NV
6-BIT Sin/D FLASH CONVERTER
Rev C1, Page 2/19
DESCRIPTION
iC-NV is a monolithic A/D converter which produces two digital A/B incremental signals phase-shifted at 90°
from two sinusoidal input signals, also phase-shifted at 90°.
The converter operates on the flash principle with fast single comparators. The back-end signal processing
circuit includes a no-delay glitch filter which can be set so that only clearly countable incremental signals are
generated. The minimum transition distance for outputs A and B can be set via an external resistor and
adapted to suit the application on hand. For static input signals hysteresis prevents the switching of the
outputs.
By programming the pins the interpolator can be set to nine different resolutions between 4 and 64 angle steps
per cycle; multiplication values of between 1 and 16 are possible for the frequency. The phase relation between
the sine/cosine input signals and the A/B incremental signals generated can be selected here.
The device also incorporates an index signal processing circuit which generates a digital zero pulse at Z
dependent on the analog sine/cosine input signals and the enable input ZERO. Alternatively, the converter
MSB can also be output at Z for synchronization purposes in an absolute measuring system.
The input amplifiers are configured as instrumentation amplifiers and permit sensor bridges to be directly
connected without the need for external resistors. The input amplification has nine selectable settings which
have been graded to suit standard sensor signals of between ca. 10mVpk and 1Vpk. If external calibration of
the sensor bridge is required, eg. with regard to offset, various test functions can be activated. By this the
amplified analog input signals come available at the outputs, for instance.
PACKAGES
TSSOP20 to JEDEC Standard
PIN CONFIGURATION TSSOP20 4.4mm
(top view)
PIN FUNCTIONS
No. Name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
PCOS
NCOS
SG1
SG0
VREF
ROT
SF1
SF0
GND
Z (MSB)
B
A
VDD
RCLK
VCC
GNDA
PZERO
NZERO
PSIN
NSIN
Function
Input Cosine
%
Input Cosine
&
Gain Select Input
Gain Select Input
Reference Voltage Output
A/B Phase Selection Input / Test Signal Output
Resolution Selection Input / Test Signal Output
Resolution Selection Input / Test Signal Output
Ground (digital)
Index Signal Output Z (MSB Output when
ROT= open) / Test Signal Output
Incremental Output B / Test Signal Output
Incremental Output A / Test Signal Output
+5 V Supply Voltage (digital)
Min. Transition Distance Preset Input
(use is optional; can be wired to VCC)
+5 V Supply Voltage (analog)
Ground (analog)
Index Signal Enable Input
%
Index Signal Enable Input
&
Input Sine
%
Input Sine
&
S6
S5
S4
S3
S2
S1
External connections linking VCC to VDD and GND to GNDA are
required.
iC-NV
6-BIT Sin/D FLASH CONVERTER
Rev C1, Page 3/19
ABSOLUTE MAXIMUM RATINGS
Values beyond which damage may occur; device operation is not guaranteed.
Item
Symbol
Parameter
Supply Voltage analog
Supply Voltage digital
Voltage at
NSIN, PSIN, NCOS, PCOS, NZERO,
PZERO, SG1, SG0, RCLK
SF1, SF0, ROT, A, B, Z
Current in VCC
Current in VDD
Current in GND
Current in
NSIN, PSIN, NCOS, PCOS,
NZERO, PZERO, SG1, SG0, VREF,
RCLK, SF1, SF0, ROT, A, B, Z
Pulse Current in all pins
(Latch-up strength)
ESD Susceptibility at all pins
Operating Junction Temperature
Storage Temperature Range
pulse duration < 10µs
100pF discharged through 1.5kΩ
-40
-40
V() < VCC+0.3V
V() < VDD+0.3V
Conditions
Fig.
Min.
G001 VCC
G002 VDD
G003 V()
-0.3
-0.3
-0.3
Max.
6
6
6
V
V
V
Unit
G004 Imx(VCC)
G006 Imx(VDD)
G007 Imx(GND)
G008 Imx()
-50
-50
-50
-50
-10
50
50
50
50
10
mA
mA
mA
mA
mA
G005 Imx(GNDA) Current in GNDA
G009 Ilu()
EG1 Vd()
TG1 Tj
TG2 Ts
-100
100
2
150
165
mA
kV
°C
°C
THERMAL DATA
Operating Conditions: VCC= VDD= 5V ±10%
Item
T1
Symbol
Ta
Parameter
Operating Ambient Temperature
Range
(extended temperature range of
-40 to 125 °C available on request)
Conditions
Fig.
Min.
-25
Typ.
Max.
85
°C
Unit
All voltages are referenced to ground unless otherwise noted.
All currents into the device pins are positive; all currents out of the device pins are negative.
iC-NV
6-BIT Sin/D FLASH CONVERTER
Rev C1, Page 4/19
ELECTRICAL CHARACTERISTICS
Operating Conditions: VCC= VDD= 5V ±10%, Tj= -40..125°C, unless otherwise noted
Item
Symbol
Parameter
Conditions
Tj
°C
Total Device
001
002
003
004
005
006
007
VCC,
VDD
I(VCC)
I(VDD)
Von
Voff
Vhys
Vc()hi
Permissible Supply Voltage
Supply Current in VCC
Supply Current in VDD
Power-On Reset Threshold
Power-Down Reset Threshold
Power-On Reset Hysteresis
Clamp Voltage hi at
NSIN, PSIN, NCOS, PCOS,
NZERO, PZERO, SG1, SG0,
ROT, SF1, SF0, VREF, RCLK
Vc()hi= V() -VCC;
I()= 1mA, other pins open
fin()= 200kHz; A, B, Z open
fin()= 200kHz; A, B, Z open
2
1
0.4
0.3
4.5
5.5
15
5
3.8
2.2
1.8
1.6
V
mA
mA
V
V
V
V
Fig.
Min.
Typ.
Max.
Unit
008
Vc()lo
Clamp Voltage lo at
I()= -1mA, other pins open
NSIN, PSIN, NCOS, PCOS,
NZERO, PZERO, SG1, SG0,
ROT, SF1, SF0, VREF, RCLK, A,
B, Z
Clamp Voltage hi at
A, B, Z
Input Offset Voltage
Vc()hi= V()-VDD;
I()= 1mA, other pins open
Vin() see table gain select
GAIN= 10..66
GAIN= 3..7.1
V()= 0V.. VCC
GAIN following table gain select
GAIN following table gain select
GAIN= 66.667
GAIN= 3.03
GAIN= 66.667
GAIN= 3.03
referred to 360° input signal,
GAIN= 3.03;
VPin= 2...2.6 Vpp, VNin= 2.5 Vdc
VPin= 1...1.3 Vpp, VNin= 2.5 Vdc
referred to period of A, B
GAIN= 3.03
I(VREF)= -1mA..+1mA
DIV= 1 (IPF= 10, 12, 16)
DIV= 2 (IPF= 5, 8)
DIV= 4 (IPF= 3, 4)
DIV= 8 (IPF=2)
DIV= 16 (IPF= 1)
R(RCLK, GNDA)= 47KΩ 1%;
DIV= 1
DIV= 16
V(RCLK)= VCC;
DIV= 1
DIV= 16
4
2
7
-1.5
-0.3
009
Vc()hi
0.3
1.6
V
Input Amplifiers NSIN, PSIN, NCOS, PCOS
101
Vos()
-7
-10
-50
95
98
500
2.3
10
15
7
10
50
101
102
mV
mV
nA
%
%
kHz
MHz
V/µs
V/µs
102
103
104
105
106
Iin()
G()
Grel
fhc
SR
Input Current
Gain
Gain Ration SIN/COS
Cut-off Frequency
Slew Rate
Signal Processing: Converter Accuracy
201
AAabs
Absolute Angle Accuracy
-1
-2
-10
1
2
10
DEG
DEG
%
202
VREF
401
501
AArel
Relative Angle Accuracy
V(VREF) Reference Voltage at VREF
RCLK
Permissible Resistor at
RCLK vs. GNDA
48
47
23
12
6
3
45
490
30
420
52
500
500
500
500
500
78
1000
78
1000
%VCC
kΩ
kΩ
kΩ
kΩ
kΩ
ns
ns
ns
ns
Signal Processing: Transition Distance Control
502
DT()
Minimum Transition Distance
503
DT()
Minimum Transition Distance
iC-NV
6-BIT Sin/D FLASH CONVERTER
Rev C1, Page 5/19
ELECTRICAL CHARACTERISTICS
Operating Conditions: VCC= VDD= 5V ±10%, Tj= -40..125°C, unless otherwise noted
Item
Symbol
Parameter
Conditions
Tj
°C
Zero Comparator
701
702
703
704
801
802
803
804
Vos()
Iin()
Vcm()
Vdm()
Vt()hi
Vt()lo
V0()
Ri()
Input Offset Voltage
Input Current
Common-Mode Input Volt. Range
Differential Input Voltage Range
Input Threshold Voltage hi
Input Threshold Voltage lo
Mid Level Voltage
Input Resistance
Saturation Voltage hi
Saturation Voltage lo
Rise Time
Fall Time
Vs()hi= VDD-V(); I()= -4mA
I()= 4mA
CL()= 50pF
CL()= 50pF
V()= Vcm()
V()= 0V.. VCC
-20
-50
1.4
0
60
25
43
45
150
20
50
VCC-1.5
VCC
78
40
57
220
0.4
0.4
60
60
mV
nA
V
V
%VCC
%VCC
%VCC
kΩ
V
V
ns
ns
Fig.
Min.
Typ.
Max.
Unit
Signal Processing: Inputs SG1, SG0, ROT, SF1, SF0
Signal Processing: Outputs A, B, Z
D01 Vs()hi
D02 Vs()lo
D05 tr()
D06 tf()
ELECTRICAL CHARACTERISTICS: Diagrams
Fig. 1: Adjusting the minimum transition distance
via resistor RCLK (given typical at 5V, 27°C; for
IPF= 1 within 5V ±10% and -40..+125°C ranges).
Fig. 2: Similar to Figure 1; the minimum transition
distance can be reduced by smaller resistors
RCLK.
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