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CAT25C32SI-TE13

Description
CAT25C32SI-TE13
Categorystorage    storage   
File Size403KB,11 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Download Datasheet Parametric View All

CAT25C32SI-TE13 Overview

CAT25C32SI-TE13

CAT25C32SI-TE13 Parametric

Parameter NameAttribute value
MakerON Semiconductor
package instructionSOIC-8
Reach Compliance Codeunknown
Maximum clock frequency (fCLK)3 MHz
JESD-30 codeR-PDSO-G8
memory density32768 bit
Memory IC TypeEEPROM
memory width8
Number of functions1
Number of terminals8
word count4096 words
character code4000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize4KX8
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialSERIAL
Serial bus typeSPI
Maximum supply voltage (Vsup)6 V
Minimum supply voltage (Vsup)2.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal locationDUAL
Maximum write cycle time (tWC)10 ms
CAT25C32/64
32K/64K-Bit SPI Serial CMOS EEPROM
FEATURES
s
10 MHz SPI compatible
s
1.8 to 6.0 volt operation
s
Hardware and software protection
s
Low power CMOS technology
s
SPI modes (0,0 &1,1)
s
Commercial, industrial and automotive
s
1,000,000 program/erase cycles
s
100 year data tetention
s
Self-timed write cycle
s
8-pin DIP/SOIC and 14-pin TSSOP
s
64-Byte page write buffer
s
Block write protection
temperature ranges
– Protect 1/4, 1/2 or all of EEPROM array
DESCRIPTION
The CAT25C32/64 is a 32K/64K-Bit SPI Serial CMOS
EEPROM internally organized as 4Kx8/8Kx8 bits.
Catalyst’s advanced CMOS Technology substantially
reduces device power requirements. The CAT25C32/
64 features a 64-byte page write buffer. The device
operates via the SPI bus serial interface and is enabled
though a Chip Select (CS). In addition to the Chip Select,
the clock input (SCK), data in (SI) and data out (SO) are
PIN CONFIGURATION
DIP Package (P, L, GL)
CS
SO
WP
VSS
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
BLOCK DIAGRAM
i
D
SO
SI
CS
WP
HOLD
SCK
I/O
CONTROL
i
t
n
o
c
s
CS
SO
WP
VSS
SENSE AMPS
SHIFT REGISTERS
WORD ADDRESS
BUFFERS
COLUMN
DECODERS
CONTROL LOGIC
SOIC Package (S, V, GV)
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
d
e
u
n
Pin Name
SO
SCK
WP
V
CC
V
SS
CS
required to access the device. The
HOLD
pin may be
used to suspend any serial communication without
resetting the serial sequence. The CAT25C32/64 is
designed with software and hardware write protection
features including Block write protection. The device is
available in 8-pin DIP, 8-pin SOIC, 14-pin TSSOP and
20-pin TSSOP packages.
a
P
CS
SO
NC
NC
NC
WP
V
SS
s
t
r
VCC
HOLD
NC
NC
NC
SCK
SI
TSSOP Package (U14, Y14)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
PIN FUNCTIONS
Function
Serial Data Output
Serial Clock
Write Protect
+1.8V to +6.0V Power Supply
Ground
Chip Select
Serial Data Input
Suspends Serial Input
No Connect
SPI
CONTROL
LOGIC
XDEC
E
2
PROM
ARRAY
BLOCK
PROTECT
LOGIC
DATA IN
STORAGE
HIGH VOLTAGE/
TIMING CONTROL
STATUS
REGISTER
SI
HOLD
NC
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
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