A Product Line of
Diodes Incorporated
ZXLD1370
60V HIGH ACCURACY BUCK/BOOST/BUCK-BOOST LED DRIVER CONTROLLER
Description
The ZXLD1370 is an LED driver controller IC for driving
external MOSFETs to drive high current LEDs. It is a multi-
topology controller enabling it to efficiently control the current
through series connected LEDs. The multi-topology enables
it to operate in buck, boost and buck-boost configurations.
The 60V capability coupled with its multi-topology capability
enables it to be used in a wide range of applications and
drive in excess of 15 LEDs in series.
The ZXLD1370 is a modified hysteretic controller using a
patent pending control scheme providing high output current
accuracy in all three modes of operation. High accuracy
dimming is achieved through DC control and high frequency
PWM control.
The ZXLD1370 uses two pins for fault diagnosis. A flag
output highlights a fault, while the multi-level status pin gives
further information on the exact fault.
Pin Assignments
TSSOP-16 EP
Features
•
•
•
•
•
0.5% typical output current accuracy
6 to 60V operating voltage range
LED driver supports Buck, Boost and Buck-boost
configurations
Wide dynamic range dimming
o
20:1 DC dimming
o
1000:1 dimming range at 500Hz
Up to 1MHz switching
High temperature control of LED current using T
ADJ
•
•
Typical Application Circuit
Buck-boost diagram utilizing thermistor and Tadj
Curve showing LED current vs. T
LED
ZXLD1370
Document number: DS32165 Rev. 2 - 2
1 of 33
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May 2010
© Diodes Incorporated
A Product Line of
Diodes Incorporated
ZXLD1370
Pin Descriptions
Pin Name
Pin
Type
‡
Description
Adjust input (for dc output current control)
Connect to REF to set 100% output current.
Drive with dc voltage (125mV<V
ADJ
< 2.5V) to adjust output current from 10% to 200%
of set value. The ADJ pin has an internal clamp that limits the internal node to less than
3V. This provides some failsafe should they get overdriven
Internal 1.25V reference voltage output
Temperature Adjust input for LED thermal current control
Connect thermistor/resistor network to this pin to reduce output current above a preset
temperature threshold.
Connect to REF to disable thermal compensation function. (See section on thermal
control.)
Shaping capacitor for feedback control loop
Connect 100pF ±20% capacitor from this pin to ground to provide loop compensation
Operation status output (analog output)
Pin is at 4.5V (nominal) during normal operation.
Pin switches to a lower voltage to indicate specific operation warnings or fault
conditions. (See section on STATUS output.)
Status pin voltage is low during shutdown mode
Signal ground (Connect to 0V)
Power ground - Connect to 0V and pin 8 to maximize copper area
Not Connected internally – recommend connection to pin 7, (PGND), to maximize PCB
copper for thermal dissipation
Not Connected internally – recommend connection pin 10 (GATE) to permit wide copper
trace to gate of MOSFET
O
Gate drive output to external NMOS transistor – connect to pin 9
Auxiliary positive supply to internal switch gate driver
Connect to V
IN
, or auxiliary supply from 6V to 15V supply to reduce internal power
dissipation (Refer to application section for more details)
Decouple to ground with capacitor close to device (refer to Applications section)
Input supply to device (6V to 60V)
Decouple to ground with capacitor close to device (refer to Applications section)
Current monitor input. Connect current sense resistor between this pin and V
IN
The nominal voltage across the resistor is 225mV
Flag open drain output
Pin is high impedance during normal operation
Pin switches low to indicate a fault, or warning condition
Digital PWM output current control
Pin driven either by open Drain or push-pull 3.3V or 5V logic levels.
Drive with frequency higher than 100Hz to gate output ‘on’ and ‘off’ during dimming
control
The device enters standby mode when PWM pin is driven with logic low level for more
than 15ms nominal (Refer to application section for more details)
Gain setting input
Used to set the device in Buck mode or Boost, Buck-boost modes
Connect to ADJ in Buck mode operation
For Boost and Buck-boost modes, connect to resistive divider from ADJ to SGND. This
defines the ratio of switch current to LED current (see application section). The GI pin
has an internal clamp that limits the internal node to less than 3V. This provides some
failsafe should they get overdriven
Exposed paddle. Connect to 0V plane for electrical and thermal management
ADJ
1
I
REF
2
O
TADJ
3
I
SHP
4
I/O
STATUS
5
O
SGND
PGND
N/C
N/C
GATE
6
7
8
9
10
P
P
-
V
AUX
11
P
V
IN
ISM
FLAG
12
13
14
P
I
O
PWM
15
I
GI
16
I
EP
Notes:
‡
PAD
P
. Type refers to whether or not pin is an Input, Output, Input/Output or Power supply pin.
ZXLD1370
Document number: DS32165 Rev. 2 - 2
2 of 33
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May 2010
© Diodes Incorporated
A Product Line of
Diodes Incorporated
ZXLD1370
Absolute Maximum Ratings
(Voltages to GND Unless Otherwise Stated)
Symbol
V
IN
V
AUX
V
ISM
V
SENSE
V
GATE
I
GATE
V
FLAG
V
PWM
, V
ADJ
,
V
TADJ
, V
GI
,
V
PWM
T
J
T
ST
Parameter
Input supply voltage relative to GND
Auxiliary supply voltage relative to GND
Current monitor input relative to GND
Current monitor sense voltage (V
IN
-V
ISM
)
Gate driver output voltage
Gate driver continuous output current
Flag output voltage
Other input pins
Maximum junction temperature
Storage temperature
Rating
-0.3 to 65
-0.3 to 65
-0.3 to 65
-0.3 to 5
-0.3 to 20
18
-0.3 to 40
-0.3 to 5.5
150
-55 to 150
Unit
V
V
V
V
V
mA
V
V
°C
°C
These are stress ratings only. Operation outside the absolute maximum ratings may cause device failure.
Operation at the absolute maximum rating for extended periods may reduce device reliability.
Recommended Operating Conditions
Symbol
V
IN
V
AUX
V
ISM
V
SENSE
V
ADJ
I
REF
f
max
V
TADJ
f
PWM
t
PWMH/L
V
PWMH
V
PWML
T
J
GI
Notes:
Parameter
Input supply voltage range
Auxiliary supply voltage range (Note 2)
Current sense monitor input range
Differential input voltage
External dc control voltage applied to ADJ
pin to adjust output current
Reference external load current
Recommended switching frequency range
(Note 3)
Temperature adjustment (T
ADJ
) input voltage
range
Recommended PWM dimming frequency range
(Note 4)
PWM pulse width in dimming mode
PWM pin high level input voltage
PWM pin low level input voltage
Operating Junction Temperature Range
Gain setting ratio for boost and buck-boost modes
Performance/Comment
Normal operation
Functional (Note 1)
Normal operation
Functional
V
VIN
-V
ISM
, with 0
≤
V
ADJ
≤
2.5
DC brightness control mode
from 10% to 200%
REF sourcing current
Min
8
6.3
8
6.3
6.3
0
0.125
Max
60
60
60
450
2.5
1
Unit
V
V
V
mV
V
mA
kHz
V
Hz
Hz
ms
V
V
°C
300
0
To achieve 1000:1 resolution
To achieve 500:1 resolution
PWM input high or low
100
100
0.002
2
0
-40
0.20
1000
V
REF
500
1000
10
5.5
0.4
125
0.50
Ratio= V
GI
/V
ADJ
1. The functional range of V
IN
is the voltage range over which the device will function. Output current and device parameters may deviate from their
normal values for V
IN
and V
AUX
voltages between 6V and 8V, depending upon load and conditions.
2. V
AUX
can be driven from a voltage higher than V
IN
to provide higher efficiency at low V
IN
voltages, but to avoid false operation; a voltage should not
be applied to V
AUX
in the absence of a voltage at V
IN
.
3. The device contains circuitry to control the switching frequency to approximately 400kHz. The maximum and minimum operating frequency are not
tested in production.
4. This gives maximum resolution at the expense of accuracy. To ensure accuracy the following equation should be used: 2*Resolution *f
PWM
< f
SWH
ZXLD1370
Document number: DS32165 Rev. 2 - 2
3 of 33
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May 2010
© Diodes Incorporated
A Product Line of
Diodes Incorporated
ZXLD1370
Electrical Characteristics
(Test conditions: V
IN
= V
AUX
= 12V, T
A
= 25°C, unless otherwise specified.)
Symbol
Parameter
Supply and reference parameters
Under-Voltage detection threshold
V
UV-
Normal operation to switch disabled
Under-Voltage detection threshold
V
UV+
Switch disabled to normal operation
I
Q-IN
Quiescent current into V
IN
I
Q-AUX
Quiescent current into V
AUX
I
SB-IN
Standby current into V
IN
.
I
SB-AUX
Standby current into V
AUX
.
Internal reference voltage
V
REF
Change in reference voltage with output
ΔV
REF
current
Conditions
V
IN
or V
AUX
falling
V
IN
or V
AUX
rising
PWM pin floating.
Output not switching
PWM pin grounded
for more than 15ms
No load
Sourcing 1mA
Sinking 100 µA
Min
5.2
5.5
Typ
5.6
6
1.5
150
90
0.7
1.25
Max
6.3
6.5
3
300
150
10
1.263
5
Units
V
V
mA
µA
µA
µA
V
mV
dB
ppm/°C
1.237
-5
-60
V
REF_LINE
Reference voltage line regulation
V
IN
= V
AUX
, 6.5V<V
IN
= <60V
Reference temperature coefficient
V
REF-TC
DC-DC converter parameters
External dc control voltage applied to ADJ DC brightness control mode
V
ADJ
‡
pin to adjust output current
10% to 200%
V
ADJ
≤
2.5V
ADJ input current
I
ADJ
†
V
ADJ
= 5.0V
GI Voltage threshold for boost and buck-
V
GI
‡
V
ADJ
= 1.25V
boost modes selection
V
GI
≤
2.5V
GI input current
I
GI
†
V
GI
= 5.0V
PWM input current
I
PWM
V
PWM
= 5.5V
PWM pulse width
PWM input low
t
PWMoff
(to enter shutdown state)
Thermal shutdown upper threshold
Temperature rising.
T
SDH
(GATE output forced low)
Thermal shutdown lower threshold
Temperature falling.
T
SDL
(GATE output re-enabled)
High-Side Current Monitor (Pin ISM)
Measured into ISM pin and
Input Current
I
ISM
V
ISM
= 12V
Accuracy of nominal V
SENSE
threshold
V
SENSE_acc
voltage
V
ADJ
= 1.25V
V
SENSE-OC
Over-current sense threshold voltage
Notes:
†
-90
+/-50
1.25
2.5
100
5
0.8
100
5
36
100
25
0.125
V
nA
µA
V
nA
µA
µA
ms
ºC
ºC
10
15
150
125
11
±0.25
300
350
20
±2
375
µA
%
mV
The ADJ and GI pins have an internal clamp that limits the internal node to less than 3V. This provides some failsafe should those
pins get overdriven
.
ZXLD1370
Document number: DS32165 Rev. 2 - 2
4 of 33
www.diodes.com
May 2010
© Diodes Incorporated
A Product Line of
Diodes Incorporated
ZXLD1370
Electrical Characteristics
(Test conditions: V
IN
= V
AUX
= 12V, T
A
= 25°C, unless otherwise specified.)
Symbol
Parameter
Output Parameters
V
FLAGL
FLAG pin low level output voltage
I
FLAGOFF
FLAG pin open-drain leakage current
Conditions
Output sinking 1mA
V
FLAG
=40V
Normal operation
Out of regulation (V
SHP
out of range)
(Note 6)
V
IN
under-voltage (V
IN
< 5.6V)
Switch stalled (t
ON
or t
OFF
> 100µs)
Over-temperature (T
J
> 125°C)
Excess sense resistor current
(V
SENSE
> 0.32V)
Normal operation
No load Sourcing 1mA
(Note 7)
Sinking 1mA, (Note 8)
V
IN
= V
AU X
= V
ISM
= 18V
I
GATE
= 1mA
Charging or discharging gate of
external switch with Q
G
= 10nC and
400kHz
Min
Typ
Max
0.5
1
4.8
3.9
3.9
3.9
2.1
1.2
Units
V
µA
4.2
3.3
3.3
3.3
1.5
0.6
4.5
3.6
3.6
3.6
1.8
0.9
10
STATUS Flag no-load output voltage
V
STATUS
(Note 5)
V
R
STATUS
Output impedance of STATUS output
Driver output (PIN GATE)
V
GATEH
High level output voltage
V
GATEL
Low level output voltage
kΩ
V
0.5
V
V
mA
10
11
V
GATECL
High level GATE CLAMP voltage
I
GATE
Dynamic peak current available during
rise or fall of output voltage
12.8
±300
15
Time to assert ‘STALL’ flag and
GATE low or high
t
STALL
warning on STATUS output
(Note 9)
LED Thermal control circuit (TADJ) parameters
Upper threshold voltage
Onset of output current reduction
V
TADJH
(V
TADJ
falling)
Lower threshold voltage
Output current reduced to <10% of
V
TADJL
set value (V
TADJ
falling)
TADJ pin Input current
I
TADJ
V
TADJ
= 1.25V
Notes:
100
170
µs
560
380
625
440
690
500
1
mV
mV
µA
5. In the event of more than one fault/warning condition occurring, the higher priority condition will take precedence. E.g. ‘Excessive coil current’ and
‘Out of regulation’ occurring together will produce an output of 0.9V on the STATUS pin. The voltage levels on the STATUS output assume the
Internal regulator to be in regulation and V
ADJ
<=V
REF
. A reduction of the voltage on the STATUS pin will occur when the voltage on V
IN
is near the
minimum value of 6V.
6. Flag is asserted if V
SHP
<2.5V or V
SHP
>3.5V
7. GATE is switched to the supply voltage V
AUX
for low values of V
AUX
(i.e. between 6V and approximately 12V). For V
AUX
>12V, GATE is clamped
internally to prevent it exceeding 15V.
8. GATE is switched to PGND by an NMOS transistor
9. If t
ON
exceeds t
STALL
, the device will force GATE low to turn off the external switch and then initiate a restart cycle. During this phase, ADJ is
grounded internally and the SHP pin is switched to its nominal operating voltage, before operation is allowed to resume. Restart cycles will be
repeated automatically until the operating conditions are such that normal operation can be sustained. If t
OFF
exceeds t
STALL
, the switch will remain
off until normal operation is possible.
ZXLD1370
Document number: DS32165 Rev. 2 - 2
5 of 33
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May 2010
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