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IS62LV25616L-70TI

Description
Standard SRAM, 256KX16, 70ns, CMOS, PDSO44, TSOP2-44
Categorystorage    storage   
File Size92KB,10 Pages
ManufacturerIntegrated Silicon Solution ( ISSI )
Download Datasheet Parametric View All

IS62LV25616L-70TI Overview

Standard SRAM, 256KX16, 70ns, CMOS, PDSO44, TSOP2-44

IS62LV25616L-70TI Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIntegrated Silicon Solution ( ISSI )
Parts packaging codeTSOP2
package instructionTSOP2-44
Contacts44
Reach Compliance Codecompliant
ECCN code3A991.B.2.A
Maximum access time70 ns
I/O typeCOMMON
JESD-30 codeR-PDSO-G44
JESD-609 codee0
length18.41 mm
memory density4194304 bit
Memory IC TypeSTANDARD SRAM
memory width16
Number of functions1
Number of terminals44
word count262144 words
character code256000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize256KX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Encapsulate equivalent codeTSOP44,.46,32
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply2.5/3.3 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Minimum standby current1.5 V
Maximum slew rate0.035 mA
Maximum supply voltage (Vsup)3.3 V
Minimum supply voltage (Vsup)2.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width10.16 mm
IS62LV25616L/LL
256K x 16 LOW VOLTAGE, ULTRA
LOW POWER CMOS STATIC RAM
FEATURES
• High-speed access time: 70, 85, 100 ns
• CMOS low power operation
– 75 mW (typical) operating
– 6 µW (typical) CMOS standby
• TTL compatible interface levels
• Single 2.5V-3.3V V
CC
power supply
• Fully static operation: no clock or refresh
required
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
• Available in the 44-pin TSOP (Type II) and
48-pin mini BGA (8mm x 10mm)
ISSI
DESCRIPTION
®
PRELIMINARY INFORMATION
MAY 2000
The
ISSI
IS62LV25616L and IS62LV25616LL are
high-speed, 4,194,304 bit static RAMs organized as
262,144 words by 16 bits. They are fabricated using
ISSI
's high-performance CMOS technology. This highly
reliable process coupled with innovative circuit design
techniques, yields high-performance and low power
consumption devices.
When
CE
is HIGH (deselected) or when
CE
is low and both
LB
and
UB
are HIGH, the device assumes a standby mode at which the
power dissipation can be reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable and
Output Enable inputs,
CE
and
OE.
The active LOW Write Enable
(WE) controls both writing and reading of the memory. A data byte
allows Upper Byte (UB) and Lower Byte (LB) access.
The IS62LV25616L and IS62LV25616LL are packaged in the
JEDEC standard 44-pin TSOP (Type II) and 48-pin mini BGA
(8mm x 10mm).
FUNCTIONAL BLOCK DIAGRAM
A0-A17
DECODER
256K x 16
MEMORY ARRAY
VCC
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CE
OE
WE
UB
LB
CONTROL
CIRCUIT
This document contains PRELIMINARY INFORMATION data. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best
possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
PRELIMINARY INFORMATION
05/03/00
Rev. 00A
1

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