Features
•
ATA6833 Temperature Range T
J
= 150°C
•
ATA6834 Extended Temperature Range T
J
= 200°C
•
Direct Driving of 6 External NMOS Transistors with a Maximum Switching Frequency of
•
•
•
•
•
•
•
•
•
•
•
50 kHz
Integrated Charge Pump to Provide Gate Voltages for High-side Drivers and to Supply
the Gate of the External Battery Reverse Protection NMOS
Built-in 5V/3.3V Voltage Regulator with Current Limitation
Reset Signal for the Microcontroller
Sleep Mode with Supply Current of typically < 45 µA
Wake-up via LIN Bus or High Voltage Input
Programmable Window Watchdog
Battery Overvoltage Protection and Battery Undervoltage Management
Overtemperature Warning and Protection (Shutdown)
200 mA Peak Current for Each Output Driver
LIN Transceiver Conformal to LIN 2.1 and SAEJ2602-2 with Outstanding EMC and ESD
Performance
QFN48 Package 7 mm
×
7 mm
BLDC Motor
Driver and LIN
System Basis
Chip
ATA6833
ATA6834
Preliminary
1. Description
The ATA6833 and ATA6834 are system basis chips for three-phase brushless DC
motor controllers designed in Atmel
®
’s state-of-the-art 0.8 µm SOI technology
SMART-I.S.
™
1. In combination with a microcontroller and six discrete power MOS-
FETs, the system basis chip forms a BLDC motor control unit for automotive
applications. In addition, the circuits provide a 3.3V/5V linear regulator and a window
watchdog.
The circuit includes various control and protection functions like overvoltage and over-
temperature protection, short circuit detection, and undervoltage management.
Thanks to these function blocks, the driver fulfils a maximum of safety requirements
and offers a high integration level to save cost and space in various applications. The
target applications are most suitable for the automotive market due to the robust tech-
nology and the high qualification level. ATA6834, in particular, is designed for
applications in a high-temperature environment.
9122F–AUTO–03/10
Figure 1-1.
VBAT
Block Diagram
VBAT
VBATSW VINT VG
CPHI1
CPHI2
CPOUT
CPLO1
CPLO2
PBAT
VMODE
VCC
3.3/5V
VCC
Regulator
13V
Regulator
CP
High-side
Driver
3
High-side
Driver 2
H3
DG1
DG2
DG3
H2
Supervisor:
Short
Circuit
Overtemperature
Undervoltage
VINT 5V
Regulator
VBG
Oscillator
High-side
Driver 1
H1
S1
S2
S3
Microcontroller
/RESET
WD
IH1-3
IL1-3
M
Logic Control
ATA6833/34
Low-side
Driver 1
Low-side
Driver 2
L1
RX
TX
LIN
WD
Timer
CC
Timer
Low-side
Driver
3
L3
Hall A
Hall B
Hall C
LIN
LINGND EN1 EN2 GND RWD WDD
CC
PGND
2
ATA6833/ATA6834 [Preliminary]
9122F–AUTO–03/10
Hall A
Hall B
Hall C
L2
ATA6833/ATA6834 [Preliminary]
2. Pin Configuration
Figure 2-1.
Pinning QFN48
VBATSW
VCC
PGND
L3
L2
EN2
VBAT
NC
L1
VG
PBAT
NC
CPLO1
CPHI1
CPLO2
CPHI2
CPOUT
S1
H1
S2
H2
S3
H3
DG3
VMODE
VINT
RWD
CC
/RESET
WD
WDD
EN1
NC
NC
GND
LINGND
48 47 46 45 44 43 42 41 40
39 38 37
36
1
35
2
34
3
33
4
32
5
Atmel YWW
31
6
ATA6833/ATA6834
30
7
ZZZZZ-AL
29
8
28
9
27
10
26
11
25
12
13 14 15 16 17 18 19 20 21 22 23 24
NC
TXD
IL3
IH3
IL2
IH2
IL1
IH1
RXD
DG1
DG2
LIN
Note:
YWW
ATA683x
ZZZZZ
AL
Date code (Y = Year - above 2000, WW = week number)
Product name
Wafer lot number
Assembly sub-lot number
Table 2-1.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Pin Description
Symbol
VMODE
VINT
RWD
CC
/RESET
WD
WDD
EN1
N.C.
N.C.
GND
LINGND
LIN
NC
TXD
IL3
IH3
I
I
I
I/O
I
I/O
I
I/O
I
I/O
O
I
I
I
Function
Selector for V
CC
and interface logic voltage level
Blocking capacitor
Resistor defining the watchdog interval
RC combination to adjust cross conduction time
Reset signal for microcontroller
Watchdog trigger signal
Enable and disable the watchdog
Microcontroller output to switch system in Sleep Mode
Connect to GND
Connect to GND
Ground
Ground for LIN connected to GND
LIN-bus terminal
Connect to GND
Transmit signal to LIN bus from microcontroller
Control Input for output L3
Control Input for output H3
3
9122F–AUTO–03/10
Table 2-1.
Pin
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Pin Description
Symbol
IL2
IH2
IL1
IH1
RXD
DG1
DG2
DG3
H3
S3
H2
S2
H1
S1
CPOUT
CPHI2
CPLO2
CPHI1
CPLO1
NC
PBAT
VG
L1
L2
L3
PGND
VCC
NC
VBAT
EN2
VBATSW
I
I
O
I
I/O
O
O
O
I
O
I/O
I
I
I
I
O
O
O
O
O
I/O
O
I/O
O
I/O
I/O
I
O
I
O
Function
Control Input for output L2
Control Input for output H2
Control Input for output L1
Control Input for output H1
Receive signal from LIN bus for microcontroller
Diagnostic output 1
Diagnostic output 2
Diagnostic output 3
Gate voltage high-side 3
Voltage at half bridge 3
Gate voltage high-side 2
Voltage at half bridge 2
Gate voltage high-side 1
Voltage at half bridge 1
Charge pump output capacitor
Charge pump capacitor 2
Charge pump capacitor 2
Charge pump capacitor 1
Charge pump capacitor 1
Connect to GND
Power supply (after reverse protection) for charge pump and gate drivers
Blocking capacitor
Gate voltage H-bridge, low-side 1
Gate voltage H-bridge, low-side 2
Gate voltage H-bridge, low-side 3
Power ground for H-bridge and charge pump
5V/100 mA supply for microcontroller
Connect to GND
Supply voltage for IC core (after reverse protection)
High voltage enable input
100Ω PMOS switch from V
BAT
4
ATA6833/ATA6834 [Preliminary]
9122F–AUTO–03/10
ATA6833/ATA6834 [Preliminary]
3. Functional Description
3.1
3.1.1
Power Supply Unit with Supervisor Functions
Power Supply
The IC has to be supplied by a reverse-protected battery voltage. To prevent damage to the IC,
proper external protection circuitry has to be added. It is recommended to use at least one
capacitor combination of storage and RF capacitors behind the reverse protection circuitry,
which is connected close to the VBAT and GND pins of the IC.
A fully integrated low-power and low-drop regulator (VINT regulator), stabilized by an external
blocking capacitor, provides the necessary low-voltage supply needed for the wake-up process.
A trimmed low-power band gap is used as reference for the VINT regulator as well as for the
VCC regulator. All internal blocks are supplied by VINT regulator. VINT regulator must not be
used for any external supply purposes.
Nothing inside the IC except the logic interface to the external microcontroller is supplied by the
5V/3.3V VCC regulator.
Both voltage regulators are checked by a “power-good comparator”, which keeps the whole chip
in reset as long as the internal supply voltage (VINT regulator output) is too low and generates a
reset for the external microcontroller if the output voltage of the VCC regulator is not sufficient.
3.1.2
VBatt Switch
This high-voltage switch provides the battery voltage at pin VBATSW for various purposes. It is
switched ON after power on reset when the IC transits to Active Mode and it will only turn OFF
when the IC changes to Sleep Mode. Watchdog resets do not have an effect on the switch. The
switch can be used for measuring purposes as well as to switch on external voltage regulators.
3.1.3
Voltage Supervisor
This function is implemented to protect the IC and the external power MOS transistors from
damage due to overvoltage on PBAT input. In the event of overvoltage (V
THOV
) or undervoltage
(V
THUV
), the external NMOS motor driver transistors will be switched off. The failure state will be
flagged on DG2 pin. It is recommended to block PBAT with an external RF capacitor to suppress
high frequency disturbances.
Temperature Supervisor
An integrated temperature sensor prevents the IC from overheating. If the temperature is above
the overtemperature pre-warning threshold T
JPW set
, the diagnostic pin DG3 will be switched to
HIGH to signal this event to the external microcontroller. The microcontroller should take actions
to reduce the power dissipation in the IC. If the temperature rises above the overtemperature
shutdown threshold T
J switch off
, the VCC regulator and all output drivers together with the LIN
transceiver will be switched OFF immediately and the /RESET signal will go LOW. Both thresh-
olds have a built-in hysteresis to avoid oscillations. The IC will return to normal operation (Active
Mode) when it has cooled down below the shutdown threshold. When the junction temperature
drops below the pre-warning threshold, bit DG3 will be switched LOW.
3.1.4
5
9122F–AUTO–03/10
京公网安备 11010802033920号
EEWORLD
