MB89372APD datasheet, PDF - EEWORLD Datasheet

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MB89372APD: Description2 CHANNEL(S), 2Mbps, MULTI PROTOCOL CONTROLLER, PQCC68, PLASTIC, LCC-68; CategoryThe embedded processor and controller Microcontrollers and processors; File Size805KB，43 Pages; ManufacturerFUJITSU; Websitehttp://edevice.fujitsu.com/fmd/en/index.html

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MB89372APD Overview

2 CHANNEL(S), 2Mbps, MULTI PROTOCOL CONTROLLER, PQCC68, PLASTIC, LCC-68

MB89372APD Parametric

Parameter Name	Attribute value
Maker	FUJITSU
Parts packaging code	LCC
package instruction	QCCJ,
Contacts	68
Reach Compliance Code	unknown
Address bus width	24
boundary scan	NO
maximum clock frequency	8 MHz
letter of agreement	ASYNC, BIT; SYNC, BYTE; BISYNC; EXT SYNC
Data encoding/decoding methods	NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)
Maximum data transfer rate	0.25 MBps
External data bus width	8
JESD-30 code	S-PQCC-J68
length	24.205 mm
low power mode	NO
Number of DMA channels	4
Number of I/O lines
Number of serial I/Os	2
Number of terminals	68
On-chip data RAM width
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Package shape	SQUARE
Package form	CHIP CARRIER
Certification status	Not Qualified
RAM (number of words)	0
Maximum seat height	4.57 mm
Maximum slew rate	40 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
width	24.205 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, MULTI PROTOCOL

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MB89372APD Related Products

	MB89372APD	MB89372APFQ	MB89372APSH
Description	2 CHANNEL(S), 2Mbps, MULTI PROTOCOL CONTROLLER, PQCC68, PLASTIC, LCC-68	2 CHANNEL(S), 2Mbps, MULTI PROTOCOL CONTROLLER, PQFP64, PLASTIC, QFP-64	2 CHANNEL(S), 2Mbps, MULTI PROTOCOL CONTROLLER, PDIP64, PLASTIC, DIP-64
Maker	FUJITSU	FUJITSU	FUJITSU
Parts packaging code	LCC	QFP	DIP
package instruction	QCCJ,	QFP,	SDIP,
Contacts	68	64	64
Reach Compliance Code	unknown	unknown	unknown
Address bus width	24	24	24
boundary scan	NO	NO	NO
maximum clock frequency	8 MHz	8 MHz	8 MHz
letter of agreement	ASYNC, BIT; SYNC, BYTE; BISYNC; EXT SYNC	ASYNC, BIT; SYNC, BYTE; BISYNC; EXT SYNC	ASYNC, BIT; SYNC, BYTE; BISYNC; EXT SYNC
Data encoding/decoding methods	NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)	NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)	NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)
Maximum data transfer rate	0.25 MBps	0.25 MBps	0.25 MBps
External data bus width	8	8	8
JESD-30 code	S-PQCC-J68	R-PQFP-G64	R-PDIP-T64
length	24.205 mm	20 mm	58 mm
low power mode	NO	NO	NO
Number of DMA channels	4	4	4
Number of serial I/Os	2	2	2
Number of terminals	68	64	64
Maximum operating temperature	70 °C	70 °C	70 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	QCCJ	QFP	SDIP
Package shape	SQUARE	RECTANGULAR	RECTANGULAR
Package form	CHIP CARRIER	FLATPACK	IN-LINE, SHRINK PITCH
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	4.57 mm	3.35 mm	5.65 mm
Maximum slew rate	40 mA	40 mA	40 mA
Maximum supply voltage	5.5 V	5.5 V	5.5 V
Minimum supply voltage	4.5 V	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V	5 V
surface mount	YES	YES	NO
technology	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	J BEND	GULL WING	THROUGH-HOLE
Terminal pitch	1.27 mm	1 mm	1.778 mm
Terminal location	QUAD	QUAD	DUAL
width	24.205 mm	14 mm	19.05 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, MULTI PROTOCOL	SERIAL IO/COMMUNICATION CONTROLLER, MULTI PROTOCOL	SERIAL IO/COMMUNICATION CONTROLLER, MULTI PROTOCOL

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