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AD9100SD/883B

Description
IC TRACK AND HOLD AMPLIFIER, 0.02 us ACQUISITION TIME, CDIP28, SKINNY, SIDE BRAZED, CERAMIC, DIP-28, Sample and Hold Circuit
CategoryAnalog mixed-signal IC    Amplifier circuit   
File Size436KB,12 Pages
ManufacturerADI
Websitehttps://www.analog.com
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AD9100SD/883B Overview

IC TRACK AND HOLD AMPLIFIER, 0.02 us ACQUISITION TIME, CDIP28, SKINNY, SIDE BRAZED, CERAMIC, DIP-28, Sample and Hold Circuit

AD9100SD/883B Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerADI
Parts packaging codeDIP
package instructionSKINNY, SIDE BRAZED, CERAMIC, DIP-28
Contacts28
Reach Compliance Codeunknown
ECCN codeEAR99
Nominal acquisition time0.02 µs
Amplifier typeSAMPLE AND HOLD CIRCUIT
maximum rate of descent6000 V/s
JESD-30 codeR-CDIP-T28
JESD-609 codee0
Negative supply voltage upper limit-6 V
Nominal Negative Supply Voltage (Vsup)-5.2 V
Number of functions1
Number of terminals28
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDIP
Encapsulate equivalent codeDIP20,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5,-5.2 V
Certification statusNot Qualified
Sample and hold/Track and holdTRACK
Filter level38535Q/M;38534H;883B
Maximum seat height5.72 mm
Maximum slew rate132 mA
Supply voltage upper limit6 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyBIPOLAR
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width15.24 mm
a
FEATURES
Excellent Hold Mode Distortion into 250
–88 dB @ 30 MSPS (2.3 MHz V
IN
)
–83 dB @ 30 MSPS (12.1 MHz V
IN
)
–74 dB @ 30 MSPS (19.7 MHz V
IN
)
16 ns Acquisition Time to 0.01%
<1 ps Aperture Jitter
250 MHz Tracking Bandwidth
83 dB Feedthrough Rejection @ 20 MHz
3.3 nV/√Hz Spectral Noise Density
MlL-STD-Compliant Versions Available
APPLICATIONS
A/D Conversion
Direct IF Sampling
Imaging/FLIR Systems
Peak Detectors
Radar/EW/ECM
Spectrum Analysis
CCD ATE
GENERAL DESCRIPTION
Ultrahigh Speed
Monolithic Track-and-Hold
AD9100*
FUNCTIONAL BLOCK DIAGRAM
CLK
CLK
V
IN
50
A1
SWITCH
C
HOLD
22pF
A2
V
OUT
2.3V
CLAMP
AD9100
The AD9100 is a monolithic track-and-hold amplifier which
sets a new standard for high speed and high dynamic range
applications. It is fabricated in a mature high speed complemen-
tary bipolar process. In addition to innovative design topologies,
a custom package is utilized to minimize parasitics and optimize
dynamic performance.
Acquisition time (hold to track) is 13 ns to 0.1% accuracy, and
16 ns to 0.01%. The AD9100 boasts superlative hold-mode
frequency domain performance; when sampling at 30 MSPS
hold mode distortion is less than 83 dBfs for analog frequencies
up to 12 MHz; and –74 dBfs at 20 MHz. The AD9100 can also
drive capacitive loads up to 100 pF with little degradation in
acquisition time; it is therefore well suited to drive 8- and 10-bit
flash converters at clock speeds to 50 MSPS. With a spectral
noise density of 3.3 nV/√Hz and feedthrough rejection of 83 dB
at 20 MHz, the AD9100 is well suited to enhance the dynamic
range of many 8- to 16-bit systems.
The AD9100 is “user friendly” and easy to apply: (1) it requires
+5 V/–5.2 V power supplies; (2) the hold capacitor and switch
power supply decoupling capacitors are built into the DIP pack-
age; (3) the encode clock is differential ECL to minimize clock
jitter; (4) the input resistance is typically 800 kΩ; (5) the analog
input is internally clamped to prevent damage from voltage
transients.
The AD9100 is available in a 20-lead side-brazed “skinny DIP”
package. Commercial, industrial, and military temperature
grade parts are available. Consult the factory for information
about the availability of 883-qualified devices.
PRODUCT HIGHLIGHTS
1. Hold Mode Distortion is guaranteed.
2. Monolithic construction.
3. Analog input is internally clamped to protect against over-
voltage transients and ensure fast recovery.
4. Output is short circuit protected.
5. Drives capacitive loads to 100 pF.
6. Differential ECL clock inputs.
*Patent
pending.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1998

AD9100SD/883B Related Products

AD9100SD/883B AD9100SE AD9100SE/883B AD9100AE
Description IC TRACK AND HOLD AMPLIFIER, 0.02 us ACQUISITION TIME, CDIP28, SKINNY, SIDE BRAZED, CERAMIC, DIP-28, Sample and Hold Circuit IC TRACK AND HOLD AMPLIFIER, 0.02 us ACQUISITION TIME, CQCC28, CERAMIC, LCC-28, Sample and Hold Circuit IC TRACK AND HOLD AMPLIFIER, 0.02 us ACQUISITION TIME, CQCC28, CERAMIC, LCC-28, Sample and Hold Circuit IC TRACK AND HOLD AMPLIFIER, 0.02 us ACQUISITION TIME, CQCC28, CERAMIC, LCC-28, Sample and Hold Circuit
Is it Rohs certified? incompatible incompatible incompatible incompatible
Maker ADI ADI ADI ADI
Parts packaging code DIP QLCC QLCC QLCC
package instruction SKINNY, SIDE BRAZED, CERAMIC, DIP-28 CERAMIC, LCC-28 CERAMIC, LCC-28 CERAMIC, LCC-28
Contacts 28 28 28 28
Reach Compliance Code unknown compliant unknown compliant
ECCN code EAR99 EAR99 EAR99 EAR99
Nominal acquisition time 0.02 µs 0.02 µs 0.02 µs 0.02 µs
Amplifier type SAMPLE AND HOLD CIRCUIT SAMPLE AND HOLD CIRCUIT SAMPLE AND HOLD CIRCUIT SAMPLE AND HOLD CIRCUIT
maximum rate of descent 6000 V/s 6000 V/s 6000 V/s 6000 V/s
JESD-30 code R-CDIP-T28 S-CQCC-N28 S-CQCC-N28 S-CQCC-N28
JESD-609 code e0 e0 e0 e0
Negative supply voltage upper limit -6 V -6 V -6 V -6 V
Nominal Negative Supply Voltage (Vsup) -5.2 V -5.2 V -5.2 V -5.2 V
Number of functions 1 1 1 1
Number of terminals 28 28 28 28
Maximum operating temperature 125 °C 125 °C 125 °C 85 °C
Minimum operating temperature -55 °C -55 °C -55 °C -40 °C
Package body material CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
encapsulated code DIP QCCN QCCN QCCN
Package shape RECTANGULAR SQUARE SQUARE SQUARE
Package form IN-LINE CHIP CARRIER CHIP CARRIER CHIP CARRIER
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Sample and hold/Track and hold TRACK TRACK TRACK TRACK
Maximum seat height 5.72 mm 2.54 mm 2.54 mm 2.54 mm
Maximum slew rate 132 mA 132 mA 132 mA 132 mA
Supply voltage upper limit 6 V 6 V 6 V 6 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V
surface mount NO YES YES YES
technology BIPOLAR BIPOLAR BIPOLAR BIPOLAR
Temperature level MILITARY MILITARY MILITARY INDUSTRIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form THROUGH-HOLE NO LEAD NO LEAD NO LEAD
Terminal pitch 2.54 mm 1.27 mm 1.27 mm 1.27 mm
Terminal location DUAL QUAD QUAD QUAD
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 15.24 mm 11.43 mm 11.43 mm 11.43 mm
length - 11.43 mm 11.43 mm 11.43 mm
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