PRELIMINARY INFORMATION
ICS3821
H
IGH
P
ERFORMANCE
VCXO
Description
The ICS3821 is a low-jitter, high-performance 3.3 volt
VCXO designed to replace expensive discrete VCXOs
modules. The on-chip Voltage Controlled Crystal
Oscillator accepts a 0 to 3.3 V input voltage to cause
the output clocks to vary by ±130 ppm. Using ICS’
patented VCXO techniques, the device uses an
inexpensive external pullable crystal in the range of 12
to 36 MHz to produce a VCXO output clock at that
same frequency.
ICS manufactures the largest variety of Set-Top Box
and multimedia clock synthesizers for all applications. If
more clock outputs are needed, see the MK3732 or
MK377x family of parts. Consult ICS to eliminate
VCXOs, crystals, and oscillators from your board.
The frequency of the on-chip VCXO is adjusted by an
external control voltage input into pin VIN. Because
VIN is a high-impedance input, it can be driven directly
from an PWM RC integrator circuit. Frequency output
increases with VIN voltage input. The usable range of
VIN is 0 to 3.3 V.
Features
•
•
•
•
•
•
•
•
•
Packaged in 8-pin SOIC
Operational frequency range of 12 MHz to 36 MHz
Uses an inexpensive external crystal
On-chip patented VCXO with pull range of ±130 ppm
(minimum)
VCXO tuning voltage of 0 to 3.3 V
Operating voltage of 3.3 V
12 mA output drive capability at TTL levels
Advanced, low-power, CMOS process
Available in a lead-free package
Block Diagram
VDD
VIN
X1
12 to 36 MHz
Pullable
Crystal
X2
Voltage
Controlled
Crystal
Oscillator
12 to 36 MHz
Clock (REFOUT)
GND
OE
MDS 3821 A
I n t e gra te d C i r c u i t S y s t e m s
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1
525 Race Stre et, San Jo se, CA 9 5126
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Revision 050905
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PRELIMINARY INFORMATION
ICS3821
H
IGH
P
ERFORMANCE
VCXO
Pin Assignment
X1
DC
VIN
GND
1
2
3
4
8
7
6
5
X2
OE
VDD
REFOUT
8-Pin (150 mil) SOIC
Pin Descriptions
Pin
Number
1
2
3
4
5
6
7
8
Pin
Name
X1
DC
VIN
GND
REFOUT
VDD
OE
X2
Pin
Type
Input
—
Input
Power
Output
Power
Input
Input
Pin Description
Crystal connection. Connect to the external pullable crystal.
Do not connect anything to this pin.
Voltage input to VCXO. Zero to 3.3 V signal which controls the
VCXO frequency.
Connect to ground.
VCXO CMOS level clock output matches the nominal frequency of
the crystal.
Connect to +3.3 V (0.01µf decoupling capacitor recommended).
Output Enable. Active high input—1: Enable; 0: Hi-Z (Disable).
Internal pull-up.
Crystal connection. Connect to a pullable 12 to 36 MHz crystal.
MDS 3821 A
In te grated Circuit Systems
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2
525 Ra ce Street, San Jose, CA 9512 6
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Revision 050905
tel (4 08) 297-1 201
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PRELIMINARY INFORMATION
ICS3821
H
IGH
P
ERFORMANCE
VCXO
External Component Selection
The ICS3821 requires a minimum number of external
components for proper operation.
Decoupling Capacitors
A decoupling capacitor of 0.01µF should be connected
between VDD and GND on pins 4 and 6 as close to the
ICS3821 as possible. For optimum device
performance, the decoupling capacitor should be
mounted on the component side of the PCB. Avoid the
use of vias in the decoupling circuit.
Recommended Crystal Parameters:
Initial Accuracy at 25
°
C
Temperature Stability
Aging
Load Capacitance
Shunt Capacitance, C0
C0/C1 Ratio
Equivalent Series Resistance
±20 ppm
±30 ppm
±20 ppm
10 pf
7 pF Max
250 Max
35
Ω
Max
Series Termination Resistor
When the PCB trace between the clock output and the
load is over 1 inch, series termination should be used.
To series terminate a 50Ω trace (a commonly used
trace impedance), place a 33Ω resistor in series with
the clock line, as close to the clock output pin as
possible. The nominal impedance of the clock output is
20Ω.
The external crystal must be connected as close to the
chip as possible and should be on the same side of the
PCB as the ICS3821. There should be no via’s
between the crystal pins and the X1 and X2 device
pins. There should be no signal traces underneath or
close to the crystal. See application note MAN05.
Crystal Tuning Load Capacitors
The crystal traces should include pads for small fixed
capacitors, one between X1 and ground, and another
between X2 and ground. Stuffing of these capacitors
on the PCB is optional. The need for these capacitors is
determined at system prototype evaluation, and is
influenced by the particular crystal used (manufacture
and frequency) and by PCB layout. The typical required
capacitor value is 1 to 4 pF.
The procedure for determining the value of these
capacitors can be found in application note MAN05.
Quartz Crystal
The ICS3821 VCXO function consists of the external
crystal and the integrated VCXO oscillator circuit. To
assure the best system performance (frequency pull
range) and reliability, a crystal device with the
recommended parameters (shown below) must be
used, and the layout guidelines discussed in the
following section shown must be followed.
The ICS3821 incorporates on-chip variable load
capacitors that pull (change) the frequency of the
crystal. The crystal specified for use with the ICS3821
is designed to have zero frequency error when the total
of on-chip + stray capacitance is
10 pF.
MDS 3821 A
In te grated Circuit Systems
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3
525 Ra ce Street, San Jose, CA 9512 6
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Revision 050905
tel (4 08) 297-1 201
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PRELIMINARY INFORMATION
ICS3821
H
IGH
P
ERFORMANCE
VCXO
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS3821. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Soldering Temperature
5V
Rating
-0.5 V to VDD+0.5 V
0 to +70°C
-65 to +150°C
260°C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Reference crystal parameters
Min.
0
+3.15
Typ.
–
Max.
+70
+3.45
Units
°C
V
Refer to page 3
MDS 3821 A
In te grated Circuit Systems
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4
525 Ra ce Street, San Jose, CA 9512 6
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Revision 050905
tel (4 08) 297-1 201
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PRELIMINARY INFORMATION
ICS3821
H
IGH
P
ERFORMANCE
VCXO
DC Electrical Characteristics
VDD=3.3 V ±5%
, Ambient temperature 0 to +70°C, unless stated otherwise
Parameter
Operating Voltage
Output High Voltage
Output Low Voltage
Output High Voltage (CMOS
Level)
Operating Supply Current
Short Circuit Current
VIN, VCXO Control Voltage
Symbol
VDD
V
OH
V
OL
V
OH
IDD
I
OS
V
IA
Conditions
I
OH
= -12 mA
I
OL
= 12 mA
I
OH
= -4 mA
No load
Min.
3.15
2.4
Typ.
Max.
3.45
0.4
Units
V
V
V
V
VDD-0.4
6
±50
0
3.3
mA
mA
V
AC Electrical Characteristics
VDD = 3.3 V ±5%,
Ambient Temperature 0 to +70° C, unless stated otherwise
Parameter
Output Frequency
Crystal Pullability
VCXO Gain
Output Rise Time
Output Fall Time
Output Clock Duty Cycle
Maximum Output Jitter,
Peak-to-peak
Phase Noise Relative to
Carrier for 35.328 MHz
Symbol
F
O
F
P
t
OR
t
OF
t
D
t
J
Conditions
0V< VIN < 3.3 V, Note 1
VIN = VDD/2 + 1 V, Note 1
20% to 80%, C
L
=15 pF
80% to 20%, C
L
=15 pF
Measured at 1.4 V, C
L
=15 pF
C
L
=15 pF
1 kHz
10 kHz
100 kHz
Min.
12
+ 130
Typ.
Max. Units
36
MHz
ppm
ppm/V
1.5
1.5
ns
ns
%
ps
dBc/Hz
dBc/Hz
dBc/Hz
115
40
50
60
-115
-140
-155
60
75
Note 1: External crystal device must conform with Pullable Crystal Specifications listed on page 3.
MDS 3821 A
In te grated Circuit Systems
●
5
525 Ra ce Street, San Jose, CA 9512 6
●
Revision 050905
tel (4 08) 297-1 201
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