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Datasheet> All Categories > Discrete semiconductor> The transistor> NP88N055NLE
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NP88N055NLE

Description
Power Field-Effect Transistor, 88A I(D), 55V, 0.0068ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-262AA, MP-25SK, TO-262, 3 PIN
CategoryDiscrete semiconductor    The transistor   
File Size188KB，8 Pages
ManufacturerNEC Electronics
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NP88N055NLE Overview

Power Field-Effect Transistor, 88A I(D), 55V, 0.0068ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-262AA, MP-25SK, TO-262, 3 PIN

NP88N055NLE Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerNEC Electronics
package instructionMP-25SK, TO-262, 3 PIN
Reach Compliance Codecompliant
Avalanche Energy Efficiency Rating (Eas)232 mJ
Shell connectionDRAIN
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage55 V
Maximum drain current (ID)88 A
Maximum drain-source on-resistance0.0068 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JEDEC-95 codeTO-262AA
JESD-30 codeR-PSIP-T3
JESD-609 codee0
Number of components1
Number of terminals3
Operating modeENHANCEMENT MODE
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeN-CHANNEL
Maximum pulsed drain current (IDM)352 A
Certification statusNot Qualified
surface mountNO
Terminal surfaceTIN LEAD
Terminal formTHROUGH-HOLE
Terminal locationSINGLE
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON

NP88N055NLE Preview

PRELIMINARY PRODUCT INFORMATION
MOS FIELD EFFECT TRANSISTOR
NP88N055MLE,NP88N055NLE
SWITCHING
N-CHANNEL POWER MOS FET
DESCRIPTION
These products are N-channel MOS Field Effect Transistors designed for high current switching applications.
ORDERING INFORMATION
PART NUMBER
NP88N055MLE-S18-AY
NP88N055NLE-S18-AY
Note
Note
LEAD PLATING
Pure Sn (Tin)
Pure Sn (Tin)
PACKING
Tube 50 p/tube
Tube 50 p/tube
PACKAGE
TO-220 (MP-25K) typ. 1.9 g
TO-262 (MP-25SK) typ. 1.8 g
Note
Under development
FEATURES
•
Channel temperature 175 degree rated
•
Super low on-state resistance
R
DS(on)1
= 5.2 mΩ MAX. (V
GS
= 10 V, I
D
= 44 A)
R
DS(on)2
= 6.3 mΩ MAX. (V
GS
= 5.0 V, I
D
= 44 A)
R
DS(on)3
= 6.8 mΩ MAX. (V
GS
= 4.5 V, I
D
= 44 A)
•
Low C
iss
: C
iss
= 9700 pF TYP.
•
Built-in gate protection diode
(TO-220)
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C)
Drain to Source Voltage (V
GS
= 0 V)
Gate to Source Voltage (V
DS
= 0 V)
Drain Current (DC)
Note1
Note2
V
DSS
V
GSS
I
D(DC)
I
D(pulse)
P
T
P
T
T
ch
T
stg
55
±20
±88
±352
1.8
288
175
−55
to
+175
75/88
562/232
V
V
A
A
W
W
°C
°C
A
mJ
(TO-262)
Drain Current (pulse)
Total Power Dissipation (T
A
= 25°C)
Total Power Dissipation (T
C
= 25°C)
Channel Temperature
Storage Temperature
Single Avalanche Current
Single Avalanche Energy
Note3
Note3
I
AS
E
AS
Notes 1.
Calculated constant current according to MAX. allowable channel temperature.
2.
PW
≤
10
μ
s, Duty cycle
≤
1%
3.
Starting T
ch
= 25°C, R
G
= 25
Ω,
V
GS
= 20
→
0 V (see Figure 4.)
THERMAL RESISTANCE
Channel to Case Thermal Resistance
Channel to Ambient Thermal Resistance
R
th(ch-C)
R
th(ch-A)
0.52
83.3
°C/W
°C/W
The information contained in this document is being issued in advance of the production cycle for the
product. The parameters for the product may change before final production or NEC Electronics
Corporation, at its own discretion, may withdraw the product prior to its production.
Not all products and/or types are availabe in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. D18490EJ1V0PM00 (1st edition)
Date Published November 2006 NS CP(K)
Printed in Japan
2006
NP88N055MLE,NP88N055NLE
ELECTRICAL CHARACTERISTICS (T
A
= 25°C)
CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate to Source Threshold Voltage
Forward Transfer Admittance
Drain to Source On-state Resistance
SYMBOL
I
DSS
I
GSS
V
GS(th)
| y
fs
|
R
DS(on)1
R
DS(on)2
R
DS(on)3
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge 1
Total Gate Charge 2
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
G1
Q
G2
Q
GS
Q
GD
V
F(S-D)
t
rr
Q
rr
V
DD
= 44 V, V
GS
= 10 V, I
D
= 88 A
V
DD
= 44 V
V
GS
= 5.0 V
I
D
= 88 A
I
F
= 88 A, V
GS
= 0 V
I
F
= 88 A, V
GS
= 0 V
di/dt = 100 A/
μ
s
TEST CONDITIONS
V
DS
= 55 V, V
GS
= 0 V
V
GS
=
±20
V, V
DS
= 0 V
V
DS
= V
GS
, I
D
= 250
μ
A
V
DS
= 10 V, I
D
= 44 A
V
GS
= 10 V, I
D
= 44 A
V
GS
= 5.0 V, I
D
= 44 A
V
GS
= 4.5 V, I
D
= 44 A
V
DS
= 25 V
V
GS
= 0 V
f = 1 MHz
V
DD
= 28 V, I
D
= 44 A
V
GS
= 10 V
R
G
= 1
Ω
1.5
38
2.0
75
4.1
4.8
5.1
9700
1100
490
37
22
180
35
160
88
27
48
1.0
62
120
5.2
6.3
6.8
14600
1700
890
82
56
360
88
240
140
MIN.
TYP.
MAX.
10
±10
2.5
UNIT
μ
A
μ
A
V
S
mΩ
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
nC
V
ns
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
R
G
= 25
Ω
PG.
V
GS
= 20
→
0 V
50
Ω
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L
V
DD
PG.
R
G
V
GS
R
L
V
DD
V
DS
90%
90%
10%
10%
V
GS
Wave Form
0
10%
V
GS
90%
BV
DSS
I
AS
I
D
V
DD
V
DS
V
GS
0
τ
τ
= 1
μ
s
Duty Cycle
≤
1%
V
DS
V
DS
Wave Form
0
t
d(on)
t
on
t
r
t
d(off)
t
off
t
f
Starting T
ch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
I
G
= 2 mA
PG.
50
Ω
R
L
V
DD
2
Preliminary Product Information D18490EJ1V0PM
NP88N055MLE,NP88N055NLE
TYPICAL CHARACTERISTICS (T
A
= 25°C)
Figure1. DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
350
dT - Percentage of Rated Power - %
P
T
- Total Power Dissipation - W
Figure2. TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
100
80
60
40
20
0
300
250
200
150
100
50
0
0
25
50
75
100 125 150 175 200
0
25
50
75
100 125 150 175 200
T
C
- Case Temperature - ˚C
Figure3. FORWARD BIAS SAFE OPERATING AREA
1000
d
ite )
im 10 V
)
L
on S
=
S(
I
D(DC)
R
D
t V
G
(a
T
C
- Case Temperature -
˚C
Figure4. SINGLE AVALANCHE ENERGY
DERATING FACTOR
Single Pulse Avalanche Energy - mJ
I
D(pulse)
10
PW
=
800
700
600
562 mJ
500
400
300
200
100
0
25
50
75
100
125
150
175
232 mJ
I
D
- Drain Current - A
100
10
Po
Lim wer DC
ite Dis
d
sip
a
1m
0
μ
10
s
μ
s
ms
tio
s
n
10
I
AS
= 75 A
88 A
1
Single pulse
T
C
= 25˚C
1
10
100
0.1
0.1
V
DS
- Drain to Source Voltage - V
Starting T
ch
- Starting Channel Temperature -
˚C
Figure5. TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
r
th(t)
- Transient Thermal Resistance -
˚C/W
100
R
th(ch-A)
= 83.3˚C/W
10
1
R
th(ch-C)
= 0.52˚C/W
0.1
Single pulse
T
C
= 25˚C
100
μ
1m
10 m
100 m
1
10
100
1000
0.01
10
μ
PW - Pulse Width - s
Preliminary Product Information D18490EJ1V0PM
3
NP88N055MLE,NP88N055NLE
Figure6. FORWARD TRANSFER CHARACTERISTICS
100 Pulsed
500
Figure7. DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
I
D
- Drain Current - A
I
D
- Drain Current - A
10
T
A
=
−25˚C
25˚C
75˚C
150˚C
175˚C
400
V
GS
= 10 V
300
200
100
4.5 V
5.0 V
1
0.1
0.01
1
2
3
4
V
DS
= 10 V
5
6
0
Pulsed
0
1.0
2.0
3.0
4.0
V
DS
- Drain to Source Voltage - V
V
GS
- Gate to Source Voltage - V
Figure8. FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
| y
fs
| - Forward Transfer Admittance - S
100
V
DS
= 10 V
Pulsed
10
1
T
A
= 175˚C
75˚C
25˚C
−50˚C
R
DS(on)
- Drain to Source On-state Resistance - mΩ
Figure9. DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
10
Pulsed
5
I
D
= 44 A
0.1
0.01
0.01
0.1
1
10
100
0
0
5
10
15
20
I
D
- Drain Current - A
V
GS
- Gate to Source Voltage - V
Figure11. GATE TO SOURCE THRESHOLD VOLTAGE vs.
CHANNEL TEMPERATURE
3.0
V
DS
= V
GS
I
D
= 250
μ
A
2.5
2.0
1.5
1.0
0.5
0
R
DS(on)
- Drain to Source On-state Resistance - mΩ
15
Pulsed
10
5.0 V
V
GS
= 4.5 V
5
10 V
0
V
GS(th)
- Gate to Source Threshold Voltage - V
Figure10. DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
1
10
100
1000
−50
0
50
100
150
I
D
- Drain Current - A
T
ch
- Channel Temperature -
˚C
4
Preliminary Product Information D18490EJ1V0PM
NP88N055MLE,NP88N055NLE
R
DS(on)
- Drain to Source On-state Resistance - mΩ
Figure12. DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
12
Pulsed
10
8
6
4
2
0
I
D
= 44 A
−50
0
50
100
150
V
GS
= 4.5 V
5.0 V
10 V
Figure13. SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
1000
I
SD
- Diode Forward Current - A
Pulsed
V
GS
= 10 V
100
0V
10
1
0.1
0
0.5
1.0
1.5
V
SD
- Source to Drain Voltage - V
T
ch
- Channel Temperature -
˚C
t
d(on)
, t
r
, t
d(off)
, t
f
- Switching Time - ns
C
iss
, C
oss
, C
rss
- Capacitance - pF
Figure14. CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
100000
V
GS
= 0 V
f = 1 MHz
Figure15. SWITCHING CHARACTERISTICS
1000
t
d(off)
100
t
f
t
d(on)
t
r
10
10000
C
iss
1000
C
oss
C
rss
100
0.1
1
10
100
1
0.1
1
10
100
V
DS
- Drain to Source Voltage - V
I
D
- Drain Current - A
Figure16. REVERSE RECOVERY TIME vs.
DRAIN CURRENT
1000
t
rr
- Reverse Recovery Time - ns
Figure17. DYNAMIC INPUT/OUTPUT CHARACTERISTICS
100
V
DS
- Drain to Source Voltage - V
80
60
V
DD
= 44 V
40
V
DS
V
GS
8
100
6
4
10
20
2
I
D
= 88 A
1
0.1
0
1.0
10
100
0
20
40
60
80
I
F
- Drain Current - A
0
100 120 140 160
Q
G
- Gate Charge - nC
Preliminary Product Information D18490EJ1V0PM
V
GS
- Gate to Source Voltage - V
di/dt = 100 A/
μ
s
V
GS
= 0 V
10
5
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NP88N055NLE Related Products

NP88N055NLE NP88N055MLE
Description Power Field-Effect Transistor, 88A I(D), 55V, 0.0068ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-262AA, MP-25SK, TO-262, 3 PIN Power Field-Effect Transistor, 88A I(D), 55V, 0.0068ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-220AB, MP-25K, TO-220, 3 PIN
Is it Rohs certified? incompatible incompatible
Maker NEC Electronics NEC Electronics
package instruction MP-25SK, TO-262, 3 PIN MP-25K, TO-220, 3 PIN
Reach Compliance Code compliant compliant
Avalanche Energy Efficiency Rating (Eas) 232 mJ 232 mJ
Shell connection DRAIN DRAIN
Configuration SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage 55 V 55 V
Maximum drain current (ID) 88 A 88 A
Maximum drain-source on-resistance 0.0068 Ω 0.0068 Ω
FET technology METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
JEDEC-95 code TO-262AA TO-220AB
JESD-30 code R-PSIP-T3 R-PSFM-T3
JESD-609 code e0 e0
Number of components 1 1
Number of terminals 3 3
Operating mode ENHANCEMENT MODE ENHANCEMENT MODE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
Package shape RECTANGULAR RECTANGULAR
Package form IN-LINE FLANGE MOUNT
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED
Polarity/channel type N-CHANNEL N-CHANNEL
Maximum pulsed drain current (IDM) 352 A 352 A
Certification status Not Qualified Not Qualified
surface mount NO NO
Terminal surface TIN LEAD TIN LEAD
Terminal form THROUGH-HOLE THROUGH-HOLE
Terminal location SINGLE SINGLE
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
transistor applications SWITCHING SWITCHING
Transistor component materials SILICON SILICON

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