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CBTL06DP211

Description
DisplayPort Gen1 2 : 1 multiplexer
File Size121KB,18 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
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CBTL06DP211 Overview

DisplayPort Gen1 2 : 1 multiplexer

CBTL06DP211
DisplayPort Gen1 2 : 1 multiplexer
Rev. 1 — 21 February 2011
Product data sheet
1. General description
CBTL06DP211 is a multi-channel high-speed multiplexer meant for DisplayPort (DP)
v1.1a or Embedded DisplayPort applications operating at data rate of 1.62 Gbit/s or
2.7 Gbit/s. It is designed using NXP proprietary high-bandwidth pass-gate technology and
it can be used for 1 : 2 switching or 2 : 1 multiplexing of four high-speed differential
AC-coupled DP channels. Further, it is capable of switching/multiplexing of Hot Plug
Detect (HPD) signal as well as Auxiliary (AUX) and Display Data Channel (DDC) signals.
In order to support GPUs/CPUs that have dedicated AUX and DDC I/Os, CBTL06DP211
provides an additional level of multiplexing of AUX and DDC signals delivering true
flexibility and choice.
CBTL06DP211 consumes very low current in operational mode (less than 1 mA typical)
and provides for a shutdown function (ultra low current consumption less than 10
μA)
to
support power-sensitive or battery-powered applications. It is designed for delivering
optimum performance at DP data rates of 1.62 Gbit/s and 2.7 Gbit/s.
A typical application of CBTL06DP211 is on motherboards where one of two GPU display
sources needs to be selected to connect to a display sink device or connector. A controller
chip selects which path to use by setting a select signal HIGH or LOW. Due to the
non-directional nature of the signal paths (which use high-bandwidth pass-gate
technology), the CBTL06DP211 can also be used in the reverse topology, e.g., to connect
one display source device to one of two display sink devices or connectors.
Optionally, the CBTL06DP211 can be used in conjunction with an HDMI/DVI level shifter
device (PTN3360A/B or PTN3360D) to allow for DisplayPort as well as HDMI/DVI
connectivity.
2. Features and benefits
1 : 2 switching or 2 : 1 multiplexing of DisplayPort (v1.1a - 1.62 Gbit/s or 2.7 Gbit/s)
4 high-speed differential channels with 2 : 1 multiplexing/switching for DisplayPort
signals
1 channel with 4 : 1 multiplexing/switching for AUX differential signals and DDC
single-ended clock and data signals
1 channel with 2 : 1 multiplexing/switching for single-ended HPD signals
High-bandwidth analog pass-gate technology
Very low lane intra-pair skew (5 ps typical)
Very low inter-pair skew (< 180 ps)
Switch/multiplexer position select CMOS input
Shutdown mode CMOS input
Shutdown mode delivers ultra low power consumption

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