Datasheet
R8C/LA3A Group, R8C/LA5A Group, R8C/LA6A Group, R8C/LA8A Group
RENESAS MCU
R01DS0011EJ0100
Rev.1.00
Dec 21, 2010
1. Overview
1.1
Features
The R8C/LA3A Group, R8C/LA5A Group, R8C/LA6A Group, and R8C/LA8A Group of single-chip MCUs
incorporate the R8C CPU core, which implements a powerful instruction set for a high level of efficiency and
supports a 1 Mbyte address space, allowing execution of instructions at high speed. In addition, the CPU core
integrates a multiplier for high-speed operation processing.
Power consumption is low, and the supported operating modes allow additional power control. These MCUs are
designed to maximize EMI/EMS performance.
Integration of many peripheral functions, including multifunction timer and serial interface, helps reduce the
number of system components.
The R8C/LA3A Group, R8C/LA5A Group, R8C/LA6A Group, and R8C/LA8A Group have data flash (1 KB × 2
blocks).
1.1.1
Applications
Household appliances, office equipment, audio equipment, consumer products, etc.
R01DS0011EJ0100 Rev.1.00
Dec 21, 2010
Page 1 of 102
R8C/LA3A Group, R8C/LA5A Group, R8C/LA6A Group, R8C/LA8A Group
1. Overview
1.1.2
Differences between Groups
Table 1.1 lists the Differences between Groups, Tables 1.2 and 1.3 list the Programmable I/O Ports Provided for
Each Group, and Tables 1.4 and 1.5 list the LCD Display Function Pins Provided for Each Group.
Figures 1.9 to 1.12 show the pin assignment for each group, and Tables 1.9 to 1.12 list product information.
The explanations in the chapters which follow apply to the R8C/LA8A Group only. Note the differences shown
below.
Table 1.1
Item
I/O Ports
Interrupts
Timer RJ
Differences between Groups
Function
Programmable I/O ports
High current drive ports
INT interrupt pins
Timer RJ0 output pin
Timer RJ1 output pin
Timer RJ2 I/O pin
Timer RJ2 output pin
R8C/LA3A Group
26 pins
8 pins
5 pins
None
None
None
None
None
None
5 pins
Max. 11 pins
1 pin
1 pin
Shared with
XIN pin
Shared with
XOUT pin
32-pin LQFP
R8C/LA5A Group
44 pins
8 pins
6 pins
None
None
None
None
1 pin
None
7 pins
Max. 27 pins
2 pins
2 pins
Dedicated pin
Dedicated pin
52-pin LQFP
R8C/LA6A Group
56 pins
8 pins
8 pins
None
None
None
None
1 pin
1 pin
8 pins
Max. 32 pins
2 pins
2 pins
Dedicated pin
Dedicated pin
64-pin LQFP
R8C/LA8A Group
72 pins
10 pins
8 pins
1 pin
1 pin
1 pin
1 pin
1 pin
1 pin
12 pins
Max. 40 pins
2 pins
2 pins
Dedicated pin
Dedicated pin
80-pin LQFP
Timer RH
Serial interface
A/D Converter
LCD Drive
Control Circuit
Comparator B
Clock
Timer RH output pin
UART2
Analog input pins
Segment output pins
Analog input voltage
Reference input voltage
XCIN pin
XCOUT pin
Packages
Note:
1. I/O ports are shared with I/O functions, such as interrupts or timers.
Refer to Tables 1.13 to 1.17, Pin Name Information by Pin Number, for details.
R01DS0011EJ0100 Rev.1.00
Dec 21, 2010
Page 2 of 102
R8C/LA3A Group, R8C/LA5A Group, R8C/LA6A Group, R8C/LA8A Group
1. Overview
Table 1.2
Programmable I/O Ports Provided for Each Group (R8C/LA3A Group, R8C/LA5A Group)
R8C/LA3A Group
R8C/LA5A Group
Total: 26 I/O pins
Total: 44 I/O pins
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Programmable
I/O Port
P0
P2
P3
P5
P7
P8
P9
Notes:
1. The symbol “ ” indicates a programmable I/O port.
2. The symbol “—” indicates the settings should be made as follows:
- Set 0 to the corresponding bits in the PDi (i = 0, 3, 5, 7, 9) register. When read, the content is 0.
- Set 0 to the corresponding bits in the Pi (i = 0, 3, 5, 7, 9) register. When read, the content is 0.
Table 1.3
Programmable I/O Ports Provided for Each Group (R8C/LA6A Group, R8C/LA8A Group)
R8C/LA6A Group
R8C/LA8A Group
Total: 56 I/O pins
Total: 72 I/O pins
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
—
—
Programmable
I/O Port
P0
P1
P2
P3
P4
P5
P6
P7
P8
P9
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Notes:
1. The symbol “ ” indicates a programmable I/O port.
2. The symbol “—” indicates the settings should be made as follows:
- Set 0 to the corresponding bits in the PDi (i = 1, 4 to 7, 9) register. When read, the content is 0.
- Set 0 to the corresponding bits in the Pi (i = 1, 4 to 7, 9) register. When read, the content is 0.
- Set 0 to the corresponding bits in the P7DRR register. When read, the content is 0.
R01DS0011EJ0100 Rev.1.00
Dec 21, 2010
Page 3 of 102
R8C/LA3A Group, R8C/LA5A Group, R8C/LA6A Group, R8C/LA8A Group
1. Overview
Table 1.4
LCD Display Function Pins Provided for Each Group
(R8C/LA3A Group, R8C/LA5A Group)
R8C/LA3A Group
Common output: Max. 4
Segment output: Max. 11
—
—
—
—
—
—
SEG
7
SEG SEG SEG
9
8
15
SEG
—
—
23
COM COM
2
3
—
SEG SEG
25 24
—
—
R8C/LA5A Group
Common output: Max. 4
Segment output: Max. 27
SEG SEG SEG SEG SEG SEG
6
5
4
3
2
1
SEG SEG SEG SEG SEG SEG
14 13 12 11 10
9
SEG SEG SEG SEG SEG SEG
22 21 20 19 18 17
COM COM
VL3 VL2 VL1 COM 1
2
(2)
(2)
(2)
0 SEG SEG
26 25
Shared I/O Port
P0
P2
P3
P5
—
SEG SEG SEG SEG SEG SEG
15 14 13 12 11 10
—
—
—
—
—
—
COM
VL3 VL2 VL1 COM 1
(2)
(2)
(2)
0 SEG
26
SEG
0
SEG
8
SEG
16
COM
3
SEG
24
Notes:
1. The symbol “—” indicates there is no LCD display function. Set the corresponding bits to 0 by setting registers
LSE0, LSE2, and LSE5 for these pins.
2. When using the LCD drive control circuit, set the corresponding bit in the LSE5 register to 1.
Table 1.5
LCD Display Function Pins Provided for Each Group
(R8C/LA6A Group, R8C/LA8A Group)
R8C/LA6A Group
Common output: Max. 4
Segment output: Max. 32
SEG SEG SEG SEG SEG SEG
6
5
4
3
2
1
SEG SEG SEG SEG SEG
—
14 13 12 11 10
SEG SEG SEG SEG SEG SEG
22 21 20 19 18 17
SEG SEG SEG SEG SEG SEG
30 29 28 27 26 25
SEG
—
—
—
—
—
38
VL3 VL2 VL1 COM COM COM
(2)
(2)
(2)
0
1
2
R8C/LA8A Group
Common output: Max. 4
Segment output: Max. 40
SEG SEG SEG SEG SEG SEG
6
5
4
3
2
1
SEG SEG SEG SEG SEG SEG
14 13 12 11 10
9
SEG SEG SEG SEG SEG SEG
22 21 20 19 18 17
SEG SEG SEG SEG SEG SEG
30 29 28 27 26 25
SEG SEG SEG SEG SEG SEG
38 37 36 35 34 33
VL3 VL2 VL1 COM COM COM
(2)
(2)
(2)
0
1
2
Shared I/O Port
P0
P1
P2
P3
P4
P5
SEG
7
SEG
15
SEG
23
SEG
31
SEG
39
—
SEG SEG
0
7
SEG
—
15
SEG SEG
16 23
SEG SEG
24 31
SEG
—
39
COM
—
3
SEG
0
SEG
8
SEG
16
SEG
24
SEG
32
COM
3
Notes:
1. The symbol “—” indicates there is no LCD display function. Set the corresponding bits to 0 by setting registers
LSE1, LSE4 and LSE5 for these pins.
2. When using the LCD drive control circuit, set the corresponding bit in the LSE5 register to 1.
R01DS0011EJ0100 Rev.1.00
Dec 21, 2010
Page 4 of 102
R8C/LA3A Group, R8C/LA5A Group, R8C/LA6A Group, R8C/LA8A Group
1. Overview
1.1.3
Specifications
Tables 1.6 to 1.8 list the specifications.
Table 1.6
Item
CPU
Specifications (1)
Function
Central processing unit
Specification
R8C CPU core
• Number of fundamental instructions: 89
• Minimum instruction execution time:
50 ns (f(XIN) = 20 MHz, VCC = 2.7 V to 5.5 V)
125 ns (f(XIN) = 8 MHz, VCC = 1.8 V to 5.5 V)
• Multiplier: 16 bits × 16 bits
→
32 bits
• Multiply-accumulate instruction: 16 bits × 16 bits + 32 bits
→
32 bits
• Operating mode: Single-chip mode (address space: 1 Mbyte)
Refer to Tables 1.9 to 1.12 Product Lists.
• Power-on reset
• Voltage detection 3 (detection level of voltage detection 0 and
voltage detection 1 selectable)
• CMOS I/O ports: 26, selectable pull-up resistor
(1)
• High current drive ports: 8
• CMOS I/O ports: 44, selectable pull-up resistor
(1)
• High current drive ports: 8
• CMOS I/O ports: 56, selectable pull-up resistor
(1)
• High current drive ports: 8
• CMOS I/O ports: 72, selectable pull-up resistor
(1)
• High current drive ports: 10
4 circuits: XIN clock oscillation circuit
XCIN clock oscillation circuit (32 kHz)
High-speed on-chip oscillator (with frequency adjustment function)
Low-speed on-chip oscillator
• Oscillation stop detection:
XIN clock oscillation stop detection function
• Frequency divider circuit:
Division ratio selectable from 1, 2, 4, 8, and 16
• Low-power-consumption modes:
Standard operating mode (high-speed clock, low-speed clock, high-
speed on-chip oscillator, low-speed on-chip oscillator), wait mode,
stop mode, power-off mode
Real-time clock (timer RH)
• Number of interrupt vectors: 69
• External Interrupt: 13 (INT × 5, key input × 8)
• Priority levels: 7 levels
• Number of interrupt vectors: 69
• External Interrupt: 14 (INT × 6, key input × 8)
• Priority levels: 7 levels
• Number of interrupt vectors: 69
• External Interrupt: 16 (INT × 8, key input × 8)
• Priority levels: 7 levels
• 14 bits × 1 (with prescaler)
• Selectable reset start function
• Selectable low-speed on-chip oscillator for watchdog timer
Memory
Power
Supply
Voltage
Detection
I/O Ports Programmable R8C/LA3A Group
I/O ports
R8C/LA5A Group
R8C/LA6A Group
R8C/LA8A Group
Clock
Clock generation circuits
ROM/RAM
Data flash
Voltage detection circuit
Interrupts
R8C/LA3A Group
R8C/LA5A Group
R8C/LA6A Group
R8C/LA8A Group
Watchdog Timer
Note:
1. No pull-up resistor is provided in the pins P5_4 to P5_6.
R01DS0011EJ0100 Rev.1.00
Dec 21, 2010
Page 5 of 102
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