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KS24A1281I

Description
EEPROM, 128KX1, Serial, CMOS, PDIP8, DIP-8
Categorystorage    storage   
File Size122KB,16 Pages
ManufacturerSAMSUNG
Websitehttp://www.samsung.com/Products/Semiconductor/
Download Datasheet Parametric View All

KS24A1281I Overview

EEPROM, 128KX1, Serial, CMOS, PDIP8, DIP-8

KS24A1281I Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSAMSUNG
Parts packaging codeDIP
package instructionDIP, DIP8,.3
Contacts8
Reach Compliance Codecompliant
ECCN codeEAR99
Maximum clock frequency (fCLK)1 MHz
Data retention time - minimum50
Durability500000 Write/Erase Cycles
I2C control byte1010DDDR
JESD-30 codeR-PDIP-T8
JESD-609 codee0
length9.2 mm
memory density131072 bit
Memory IC TypeEEPROM
memory width1
Number of functions1
Number of terminals8
word count131072 words
character code128000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize128KX1
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP8,.3
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialSERIAL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply2/5 V
Certification statusNot Qualified
Maximum seat height5.08 mm
Serial bus typeI2C
Maximum standby current0.000001 A
Maximum slew rate0.003 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)1.8 V
Nominal supply voltage (Vsup)2.5 V
surface mountNO
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
Maximum write cycle time (tWC)5 ms
write protectHARDWARE
KS24A1281/2561
128K/256K-bit
Serial EEPROM for Low Power
Data Sheet
OVERVIEW
The KS24A1281/2561 serial EEPROM has a 128K/256K-bit (16,384/32,768 bytes) capacity, supporting the
standard I
2
C™-bus serial interface. It is fabricated using Samsung’ most advanced CMOS technology. It has
s
been developed for low power and low voltage applications (1.8 V to 5.5 V). One of its major feature is a
hardware-based write protection circuit for the entire memory area. Hardware-based write protection is controlled
by the state of the write-protect (WP) pin. Using one-page write mode, you can load up to 64 bytes of data into
the EEPROM in a single write operation. Another significant feature of the KS24A1281/2561 is its support for fast
mode and standard mode.
FEATURES
I C-Bus Interface
Two-wire serial interface
Automatic word address increment
2
Operating Characteristics
Operating voltage
— 1.8 V to 5.5 V
Operating current
— Maximum write current: < 3 mA at 5.5 V
— Maximum read current: < 400
µA
at 5.5 V
— Maximum stand-by current: < 1
µA
at 5.5 V
Operating temperature range
— – 25°C to + 70°C (commercial)
— – 40°C to + 85°C (industrial)
Operating clock frequencies
— 400 kHz at standard mode
— 1 MHz at fast mode
Electrostatic discharge (ESD)
— 5,000 V (HBM)
— 500 V (MM)
Packages
8-pin DIP, and TSSOP
EEPROM
128K/256K-bit (16,384/32,768 bytes) storage
area
64-byte page buffer
Typical 3 ms write cycle time with
auto-erase function
Hardware-based write protection for the entire
EEPROM (using the WP pin)
EEPROM programming voltage generated
on chip
500,000 erase/write cycles
50 years data retention
8-1
FFT IP core control, data input is normal, but sink_ready is not pulled high, and data is not output. The following figure is a test picture
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