Freescale Semiconductor
Advance Information
Document Number: MC33899
Rev. 4.0, 5/2010
Programmable H-Bridge
Power IC
The 33899 is designed to drive a DC motor in both forward and
reverse shaft rotation under pulse-width modulation (PWM) control of
speed and torque. A current mirror output provides an analog
feedback signal proportional to the load current. A serial peripheral
interface (SPI) is used to select slew rate control, current
compensation limits and to read diagnostic status (faults) of the H-
Bridge drive circuits. SPI diagnostic reporting includes open circuit,
short-circuit to VIGNP, short-circuit to ground, die temperature range,
and under-voltage on VIGNP.
Features
• Drives inductive loads in a full H-Bridge configuration
• Current mirror output signal (gain selectable via external resistor)
• Short-circuit current limiting
• Thermal shutdown (outputs latched off until reset via the SPI)
• Internal charge pump circuit for the internal high side MOSFETs
• SPI-selectable slew rate control and current limit control
• Over-temperature shutdown
• Outputs can be disabled to high-impedance state
• PWM-able up to 11 kHz @ 3.0 A
• Synchronous rectification control of the high side MOSFETs
• Low R
DS(ON)
outputs at high junction temperature (< 165 mΩ @
TA = 125°C, VIGNP = 6.0 V)
• Outputs survive shorts to -1.0 V
• Pb-free packaging designated by suffix code VW
V
DDL
+5.0 V
V
IGNP
33899
PROGRAMMABLE H-BRIDGE POWER IC
VW SUFFIX (Pb-FREE)
98ASH70693A
30-PIN HSOP
ORDERING INFORMATION
Device
MC33899VW/R2
Temperature
Range (T
A
)
-40°C to 125°C
Package
30 HSOP
33899
VIGNP
VCC
VDDQ
CSNS
REDIS
CRES
VCCL
FWD
REV
PWM
EN1
S0
RS
EN2
CS
SCLK
DI
D0
LSCMP
GND
S1
MCU
Figure 1. 33899 Simplified Application Diagram
This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2007-2010. All rights reserved.
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VIGNP
CRES
Charge
Pump
To Gate
Drives
M1
M3
S1
Current
Sense,
Limitation,
and Mirror
VCC
VCCL
CSNS
+3.3 V
Internal
Regulator
S0
M2
Gate
Drives
M4
PWM
Override
REDIS
LSCMP
FWD
REV
PWM
EN1
EN2
VDDQ
SCLK
CS
DI
DO
Direction
and PWM
Control
Baseline
Slew Rate
Set
RS
Command, Fault, and
Temperature Register
Temperature
Sense and
Shutdown
GND
Figure 2. 33899 Simplified Internal Block Diagram
33899
2
Analog Integrated Circuit Device Data
Freescale Semiconductor
PIN CONNECTIONS
PIN CONNECTIONS
Tab
VDDQ
DO
DI
SCLK
CS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
CRES
REDIS
VIGNP
VIGNP
S0
S0
GND
NC
LSCMP
EN2
CSNS
VCC
VCCL
REV
FWD
PWM
RS
VIGNP
VIGNP
S1
S1
GND
NC
NC
EN1
Tab
Figure 3. 33899 Pin Connections
Table 1. 33899 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on
page 12.
Pin Number
1
2
3
4
5
6
7
Pin Name
VDDQ
DO
DI
SCLK
CS
CRES
REDIS
Formal Name
Logic Level Output Bias
SPI Data Out
SPI Data In
SPI Serial Clock Input
Chip Select
(Active Low)
Charge Pump
Automatic Output Re-
Enable Disable
Definition
Sets V
OH
level of DO output and LSCMP.
SPI control data output pin from the IC to the MCU.
SPI control data input pin from the MCU to the IC.
The SCLK input is the clock signal input for synchronization of serial data transfer.
This pin is an input connected to a chip select output of an MCU.
This pin connects an external capacitor, which is the storage reservoir for the
internal charge pump.
This input pin is a connection to a capacitor that determines the default time the
output will be turned off when the low-side current comparator is tripped, if PWM
has not commanded it. The typical value with a 0.1μF is 100μs. If shorted, the
feature is disabled.
This input pin is the primary H-Bridge power input.
Note:
Not reverse voltage protected.
These output pins drive the bi-directional motor and must be connected together
on the PC board.
These pins must be connected on the PC board to the exposed pad.
These pins have no internal connections.
This output pin pulses high anytime the low side current comparator is tripped.
These input pins determine the mode of the IC; namely, sleep, standby, and run.
These output pins drive the bi-directional motor and must be connected together
on the PC board.
8, 9, 22, 23
10, 11
12, 19
13, 17, 18
14
15
16
20, 21
VIGNP
S0
GND
NC
LSCMP
EN2
EN1
S1
Protected Ignition
Voltage
Bridge Output 0
to Load
Ground
No Connect
Low Side Comparator
Master Enable 2
Master Enable 1
Bridge Output 1
to Load
33899
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
PIN CONNECTIONS
Table 1. 33899 Pin Definitions (continued)
A functional description of each pin can be found in the Functional Pin Description section beginning on
page 12.
Pin Number
24
25
26
27
28
29
30
Tab/Pad
Pin Name
RS
PWM
FWD
REV
VCCL
VCC
CSNS
Thermal
Interface /
GND
Formal Name
Slew Rate Control
PWM Input
Forward Input
Reverse Input
3.3 V Input
5.0 V Input
Current Sense
Exposed Pad Thermal
Interface
Definition
This input pin is connected to a resistor that sets slew timing.
This input pin is used to set the motor switching and frequency duty cycle.
This input pin, along with the reverse input pin REV, determines the direction of
current flow in the H-Bridge.
This input pin, along with the forward input pin FWD, determines the direction of
current flow in the H-Bridge.
3.3 V input source.
5.0 V input source.
Output of current amplifier.
The exposed pad, a thermal interface for sinking heat from the device, is also a
high-current GND connection and must be connected to GND (pins 12 and 19).
33899
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or
permanent damage to the device.
Ratings
ELECTRICAL RATINGS
Protected Power Supply Voltage
Logic Supply Voltage
Logic Output Bias Voltage
VCCL Supply Voltage
Input / Output Voltage (FWD, REV, EN1, EN2, PWM,
CS
, DI, SCLK, DO, CSNS,
LSCMP, RS, REDIS)
Motor Outputs
Charge Pump Voltage
ESD Voltage
(1)
Human Body Model
Machine Model
THERMAL RATINGS
Operating Temperature
(2)
Ambient
Junction
Storage Temperature
Thermal Resistance, Junction to Ambient
(3)
Thermal Resistance, Junction to Case (Exposed Pad)
Peak Package Reflow Temperature During Solder Mounting
(4)
°C
T
A
T
J
T
STG
R
θ
JA
R
θ
JC
T
SOLDER
- 40 to 125
- 40 to 150
- 65 to 150
18
<0.5
220
°C
°C/W
°C/W
°C
V
ESD1
V
ESD2
± 1500
± 200
V
IGNP
V
CC
V
DDQ
V
CCL
V
I / O
V
S0
, V
S1
V
CRES
- 0.3 to 40
- 0.3 to 7.0
- 0.3 to 7.0
- 0.3 to 5.0
- 0.3 to 7.0
- 0.5 to 40
- 0.3 to 50
V
V
V
V
V
V
V
V
Symbol
Value
Unit
Notes
1. ESD1 testing is performed in accordance with the Human Body Model (C
ZAP
= 100 pF, R
ZAP
= 1500
Ω),
ESD2 testing is performed in
accordance with the Machine Model (C
ZAP
= 200 pF, R
ZAP
= 0
Ω).
2.
3.
4.
The junction temperature is the primary limiting parameter. The module thermal design must provide a low enough thermal impedance
to keep the junction temperature within limits for all anticipated power levels and ambient temperatures.
R
θ
JA
is referenced to the JEDEC standard 2s2p thermal evaluation board at 1W total device power dissipation in still air. Deviations from
this standard will produce corresponding changes in the actual thermal performance.
Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
33899
Analog Integrated Circuit Device Data
Freescale Semiconductor
5
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