MC33910G5AC datasheet, PDF - EEWORLD Datasheet

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MC33910G5AC: Description0.11 A BUF OR INV BASED PRPHL DRVR, PQFP32; Categorysemiconductor Analog mixed-signal IC; File Size875KB，90 Pages; ManufacturerFREESCALE (NXP)

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MC33910G5AC Overview

0.11 A BUF OR INV BASED PRPHL DRVR, PQFP32

MC33910G5AC Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	32
Maximum operating temperature	125 Cel
Minimum operating temperature	-40 Cel
Maximum supply voltage 1	18 V
Minimum supply voltage 1	5.5 V
Rated supply voltage 1	13.5 V
On time	10 us
Off time	10 us
Processing package description	7 × 7 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, MS-026BBA, LQFP-32
Lead-free	Yes
state	ACTIVE
packaging shape	SQUARE
Package Size	FLATPACK, low PROFILE
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	0.8000 mm
terminal coating	MATTE Tin
Terminal location	Four
Packaging Materials	Plastic/Epoxy
Temperature level	AUTOMOTIVE
Interface Type	Buffered or reverse PRPHL driver
Built-in protection	OVER current; OVER voltage; THERMAL; UNDER voltage
Output current flow direction	SOURCEAND SINK
Rated output peak current limit	0.1100 A

MC33910G5AC Preview

MC33910G5AC/MC3433910G5AC

Freescale Semiconductor

Advance Information

Document Number: MC33910

Rev. 8.0, 3/2010

LIN System Basis Chip with High

Side Drivers

The 33910G5/BAC is a Serial Peripheral Interface (SPI) controlled

System Basis Chip (SBC), combining many frequently used functions

in an MCU based system, plus a Local Interconnect Network (LIN)

transceiver. The 33910 has a 5.0 V, 50 mA/60 mA low dropout

regulator with full protection and reporting features. The device

provides full SPI readable diagnostics and a selectable timing

watchdog for detecting errant operation. The LIN Protocol Specification

2.0 and 2.1 compliant LIN transceiver has waveshaping circuitry that

can be disabled for higher data rates.

Two 50 mA/60 mA high side switches with optional pulse-width

modulated (PWM) are implemented to drive small loads. One high

voltage input is available for use in contact monitoring, or as external

wake-up input. This input can be used as high voltage Analog Input.

The voltage on this pin is divided by a selectable ratio and available via

an analog multiplexer.

The 33910 has three main operating modes: Normal (all functions

available), Sleep (V

off, wake-up via LIN, wake-up inputs (L1), cyclic

sense and forced wake-up), and Stop (V

on with limited current

capability, wake-up via CS, LIN bus, wake-up inputs, cyclic sense,

forced wake-up and external reset).

The 33910 is compatible with LIN Protocol Specification 2.0, 2.1, and

SAEJ2602-2.

Features

•

Full-duplex SPI interface at frequencies up to 4.0 MHz

LIN transceiver capable of up to 100 kbps with wave shaping

Two 50 mA/60 mA high side switches

One high voltage analog/logic Input

Configurable window watchdog

5.0 V low drop regulator with fault detection and low voltage reset

(LVR) circuitry

• Switched/protected 5.0 V output (used for Hall sensors)

• Pb-free packaging designated by suffix code AC

33910

BAT

VS1

VS2

VSENSE

HS1

33910

SYSTEM BASIS CHIP WITH LIN

GENERATION

AC SUFFIX (Pb-FREE)

98ASH70029A

32-PIN LQFP

ORDERING INFORMATION

Device

MC33910G5AC/R2

MC34910G5AC/R2

MC33910BAC/R2

MC34910BAC/R2

Temperature

Range (T

)

- 40°C to 125°C

-40°C to 85°C

- 40°C to 125°C

-40°C to 85°C

32-LQFP

Package

* See Page 2 for Device Variations

VDD

PWMIN

ADOUT0

LIN

LIN INTERFACE

MCU

MOSI

MISO

SCLK

RXD

TXD

IRQ

RST

LGND

PGND

AGND

HVDD

HS2

WDCONF

Figure 1. 33910 Simplified Application Diagram

* This document contains certain information on a new product.

Specifications and information herein are subject to change without notice.

MC33910G5AC/MC3433910G5AC

DEVICE VARIATIONS

The 33910G5 data sheet is within

MC33910G5 Product

Specifications Pages 3 to 46

Table 1. This specification support the following products

Device

MC33910G5AC/R2

Temperature

Generation

Changes

1. Increase ESD GUN IEC61000-4-2 (gun test contact with 150 pF, 330 W

test conditions) performance to achieve

6.0 kV min on the LIN pin.

2. Immunity against ISO7637 pulse 3b

3. Reduce EMC emission level on LIN

MC34910G5AC/R2

MC33910BAC/R2

MC34910BAC/R2

- 40 to 85°C

- 40 to 125°C

- 40 to 85°C

2.5

2.0

4. Improve EMC immunity against RF – target new specification including

3x68 pF

5. Comply with J2602 conformance test

Initial release

The 33910BAC data sheet is within

MC33911BAC

Product Specifications Pages 47 to 86

- 40 to 125°C

2.5

33910

Analog Integrated Circuit Device Data

Freescale Semiconductor

MC33910G5AC/MC3433910G5AC

MC33910G5 PRODUCT SPECIFICATIONS PAGES 3 TO 46

MC33910G5 PRODUCT SPECIFICATIONS

PAGES 3 TO 46

33910

Analog Integrated Circuit Device Data

Freescale Semiconductor

MC33910G5AC/MC3433910G5AC

INTERNAL BLOCK DIAGRAM

RST IRQ

VS2

VS1

VDD

INTERNAL BUS

INTERRUPT CONTROL

MODULE

LVI, HVI,

ALL OT (VDD, HS, LIN, SD)

AGND

VOLTAGE REGULATOR

PGND

RESET CONTROL

MODULE

LVR, WD, EXT µC

5.0 V OUTPUT

MODULE

HVDD

WINDOW

WATCHDOG

MODULE

PWMIN

VS2

HIGH SIDE

CONTROL

MODULE

HS1

VS2

MISO

MOSI

SCLK

ADOUT0

HS2

SPI

CONTROL

ANALOG MULTIPLEXER

BAT

SENSE MODULE

CHIP TEMPERATURE

SENSE MODULE

ANALOG INPUT

MODULE

VSENSE

WAKE-UP MODULE

RXD

TXD

DIGITAL INPUT MODULE

LIN PHYSICAL

LAYER

LIN

LGND

WDCONF

Figure 2. 33910 Simplified Internal Block Diagram

33910

Analog Integrated Circuit Device Data

Freescale Semiconductor

MC33910G5AC/MC3433910G5AC

PIN CONNECTIONS

AGND

HVDD

VDD

VSENSE

VS1

NC*

VS2

HS1

RXD

TXD

MISO

MOSI

SCLK

ADOUT0

PWMIN

* See Recommendation in Table below

HS2

NC*

PGND

NC*

IRQ

RST

NC*

WDCONF

LGND

LIN

NC*

Figure 3. 33910 Pin Connections

Table 2. 33910 Pin Definitions

A functional description of each pin can be found in the

Functional Pin Description.

Pin Name

RXD

TXD

MISO

MOSI

SCLK

ADOUT0

PWMIN

RST

IRQ

Formal Name

Receiver Output

Transmitter Input

SPI Output

SPI Input

SPI Clock

SPI Chip Select

Analog Output Pin 0

PWM Input

Internal Reset I/O

Internal Interrupt

Output

Not Connected

Definition

This pin is the receiver output of the LIN interface which reports the state of

the bus voltage to the MCU interface.

This pin is the transmitter input of the LIN interface which controls the state of

the bus output.

SPI (Serial Peripheral Interface) data output. When CS is high, pin is in the

high-impedance state.

SPI (Serial Peripheral Interface) data input.

SPI (Serial Peripheral Interface) clock Input.

SPI (Serial Peripheral Interface) chip select input pin. CS is active low.

Analog Multiplexer Output.

High Side Pulse Width Modulation Input.

Bidirectional Reset I/O pin - driven low when any internal reset source is

asserted. RST is active low.

Interrupt output pin, indicating wake-up events from Stop modemode or

events from Normal and Normal request modes. IRQ is active low.

This pin must not be connected.

NC*

33910

Analog Integrated Circuit Device Data

Freescale Semiconductor

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