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CMBT3904E

Description
ENHANCED SPECIFICATION SURFACE MOUNT COMPLEMENTARY SILICON TRANSISTORS
CategoryDiscrete semiconductor    The transistor   
File Size357KB,3 Pages
ManufacturerCentral Semiconductor
Download Datasheet Parametric Compare View All

CMBT3904E Overview

ENHANCED SPECIFICATION SURFACE MOUNT COMPLEMENTARY SILICON TRANSISTORS

CMBT3904E Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerCentral Semiconductor
package instructionSMALL OUTLINE, R-PDSO-F3
Contacts3
Reach Compliance Codenot_compliant
ECCN codeEAR99
Maximum collector current (IC)0.2 A
Collector-emitter maximum voltage40 V
ConfigurationSINGLE
Minimum DC current gain (hFE)30
JESD-30 codeR-PDSO-F3
JESD-609 codee0
Number of components1
Number of terminals3
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeNPN
Certification statusNot Qualified
surface mountYES
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formFLAT
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON
Nominal transition frequency (fT)300 MHz
Maximum off time (toff)250 ns
Maximum opening time (tons)70 ns
Base Number Matches1
CMBT3904E NPN
CMBT3906E PNP
ENHANCED SPECIFICATION
SURFACE MOUNT
COMPLEMENTARY
SILICON TRANSISTORS
w w w. c e n t r a l s e m i . c o m
DESCRIPTION:
The CENTRAL SEMICONDUCTOR CMBT3904E
(NPN) and CMBT3906E (PNP) are general purpose
transistors with enhanced specifications. These
devices are ideal for applications where ultra small
size and power dissipation are the prime requirements.
Packaged in the
FEMTOmini™
SOT-923 package,
these transistors provide performance characteristics
suitable for the most demanding size constrained
applications.
MARKING CODES: CMBT3904E: B
CMBT3906E: G
APPLICATIONS
• DC / DC Converters
• Voltage Clamping
• Protection Circuits
• Battery powered applications including:
Cell Phones, Digital Cameras, Pagers,
PDAs, Laptop Computers, etc.
SYMBOL
VCBO
VCEO
VEBO
IC
PD
TJ, Tstg
Θ
JA
60
40
6.0
200
100
-65 to +150
1250
UNITS
V
V
V
mA
mW
°C
°C/W
SOT-923 CASE
FEATURES
• Very Small Package Size
• 200mA Collector Current
• Low VCE(SAT) (0.1V Typ @ 50mA)
• Miniature 0.8 x 0.6 x 0.4mm
Ultra Low height profile
FEMTOmini™
Surface Mount Package
Collector-Base Voltage
Emitter-Base Voltage
MAXIMUM RATINGS:
(TA=25°C)
Collector-Emitter Voltage
Continuous Collector Current
Power Dissipation
Operating and Storage Junction Temperature
Thermal Resistance
ELECTRICAL CHARACTERISTICS:
(TA=25°C unless otherwise noted)
SYMBOL
ICEV
BVCEO
TEST CONDITIONS
VCE=30V, VEB=3.0V
IC=10µA
IC=1.0mA
IE=10µA
IC=10mA, IB=1.0mA
IC=50mA, IB=5.0mA
IC=10mA, IB=1.0mA
IC=50mA, IB=5.0mA
MIN
60
40
6.0
NPN
TYP
115
60
7.5
0.057
0.100
PNP
TYP
90
55
7.9
0.050
0.100
0.750
0.850
MAX
50
UNITS
nA
V
V
V
BVCBO
BVEBO
VCE(SAT)
VCE(SAT)
VBE(SAT)
VBE(SAT)
0.100
0.200
0.850
0.950
V
V
V
V
0.650
0.750
0.850
Enhanced specification.
R1 (8-January 2010)

CMBT3904E Related Products

CMBT3904E CMBT3904E_10 CMBT3906E
Description ENHANCED SPECIFICATION SURFACE MOUNT COMPLEMENTARY SILICON TRANSISTORS ENHANCED SPECIFICATION SURFACE MOUNT COMPLEMENTARY SILICON TRANSISTORS ENHANCED SPECIFICATION SURFACE MOUNT COMPLEMENTARY SILICON TRANSISTORS
Is it lead-free? Contains lead - Contains lead
Is it Rohs certified? incompatible - incompatible
Maker Central Semiconductor - Central Semiconductor
package instruction SMALL OUTLINE, R-PDSO-F3 - SMALL OUTLINE, R-PDSO-F3
Contacts 3 - 3
Reach Compliance Code not_compliant - _compli
ECCN code EAR99 - EAR99
Maximum collector current (IC) 0.2 A - 0.2 A
Collector-emitter maximum voltage 40 V - 40 V
Configuration SINGLE - SINGLE
Minimum DC current gain (hFE) 30 - 30
JESD-30 code R-PDSO-F3 - R-PDSO-F3
JESD-609 code e0 - e0
Number of components 1 - 1
Number of terminals 3 - 3
Maximum operating temperature 150 °C - 150 °C
Package body material PLASTIC/EPOXY - PLASTIC/EPOXY
Package shape RECTANGULAR - RECTANGULAR
Package form SMALL OUTLINE - SMALL OUTLINE
Peak Reflow Temperature (Celsius) NOT SPECIFIED - NOT SPECIFIED
Polarity/channel type NPN - PNP
Certification status Not Qualified - Not Qualified
surface mount YES - YES
Terminal surface Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb)
Terminal form FLAT - FLAT
Terminal location DUAL - DUAL
Maximum time at peak reflow temperature NOT SPECIFIED - NOT SPECIFIED
transistor applications SWITCHING - SWITCHING
Transistor component materials SILICON - SILICON
Nominal transition frequency (fT) 300 MHz - 300 MHz
Maximum off time (toff) 250 ns - 250 ns
Maximum opening time (tons) 70 ns - 70 ns

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