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CMPDM7002AG

Description
SURFACE MOUNT N-CHANNEL ENHANCEMENT-MODE SILICON MOSFET
CategoryDiscrete semiconductor    The transistor   
File Size334KB,3 Pages
ManufacturerCentral Semiconductor
Environmental Compliance
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CMPDM7002AG Overview

SURFACE MOUNT N-CHANNEL ENHANCEMENT-MODE SILICON MOSFET

CMPDM7002AG Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?conform to
MakerCentral Semiconductor
package instructionSMALL OUTLINE, R-PDSO-G3
Contacts3
Reach Compliance Codecompli
ECCN codeEAR99
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage60 V
Maximum drain current (ID)0.28 A
Maximum drain-source on-resistance2 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
Maximum feedback capacitance (Crss)5 pF
JESD-30 codeR-PDSO-G3
JESD-609 codee3
Humidity sensitivity level1
Number of components1
Number of terminals3
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeN-CHANNEL
Certification statusNot Qualified
surface mountYES
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON
CMPDM7002A
CMPDM7002AG*
SURFACE MOUNT
N-CHANNEL
ENHANCEMENT-MODE
SILICON MOSFET
w w w. c e n t r a l s e m i . c o m
DESCRIPTION:
The CENTRAL SEMICONDUCTOR CMPDM7002A
and CMPDM7002AG are special versions of the
2N7002 Enhancement-mode N-Channel Field Effect
Transistor, manufactured by the N-Channel DMOS
Process, designed for high speed pulsed amplifier and
driver applications. These special devices offer low
rDS(ON) and low VDS (ON).
MARKING CODES: CMPDM7002A:
C702A
CMPDM7002AG*: 702G
SOT-23 CASE
*
Device is
Halogen Free
by design
MAXIMUM RATINGS:
(TA=25°C)
Drain-Source Voltage
Drain-Gate Voltage
Gate-Source Voltage
Continuous Drain Current
Continuous Source Current (Body Diode)
Maximum Pulsed Drain Current
Maximum Pulsed Source Current
Power Dissipation
Operating and Storage Junction Temperature
Thermal Resistance
SYMBOL
VDS
VDG
VGS
ID
IS
IDM
ISM
PD
TJ, Tstg
Θ
JA
otherwise noted)
MIN
60
60
40
280
280
1.5
1.5
350
-65 to +150
357
MAX
100
1.0
500
UNITS
V
V
V
mA
mA
A
A
mW
°C
°C/W
UNITS
nA
μA
μA
mA
V
V
V
V
V
Ω
Ω
Ω
Ω
mS
pF
pF
pF
ns
ELECTRICAL CHARACTERISTICS:
(TA=25°C unless
SYMBOL
TEST CONDITIONS
IGSSF, IGSSR VGS=20V, VDS=0
IDSS
VDS=60V, VGS=0
IDSS
VDS=60V, VGS=0, TJ=125°C
ID(ON)
VGS=10V, VDS=10V
BVDSS
VGS=0, ID=10μA
VGS(th)
VDS=VGS, ID=250μA
VDS(ON)
VGS=10V, ID=500mA
VDS(ON)
VGS=5.0V, ID=50mA
VSD
VGS=0, IS=400mA
rDS(ON)
VGS=10V, ID=500mA
rDS(ON)
VGS=10V, ID=500mA, TJ=125°C
rDS(ON)
VGS=5.0V, ID=50mA
VGS=5.0V, ID=50mA, TJ=125°C
rDS(ON)
gFS
VDS=10V, ID=200mA
Crss
VDS=25V, VGS=0, f=1.0MHz
Ciss
VDS=25V, VGS=0, f=1.0MHz
Coss
VDS=25V, VGS=0, f=1.0MHz
ton, toff
VDD=30V, VGS=10V, ID=200mA,
RG=25Ω, RL=150Ω
500
60
1.0
2.5
1.0
0.15
1.2
2.0
3.5
3.0
5.0
5.0
50
25
20
80
R4 (27-January 2010)

CMPDM7002AG Related Products

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Description SURFACE MOUNT N-CHANNEL ENHANCEMENT-MODE SILICON MOSFET SURFACE MOUNT N-CHANNEL ENHANCEMENT-MODE SILICON MOSFET

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