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CMUT5087E

Description
ENHANCED SPECIFICATION SURFACE MOUNT COMPLEMENTARY SILICON TRANSISTORS
CategoryDiscrete semiconductor    The transistor   
File Size354KB,3 Pages
ManufacturerCentral Semiconductor
Download Datasheet Parametric Compare View All

CMUT5087E Overview

ENHANCED SPECIFICATION SURFACE MOUNT COMPLEMENTARY SILICON TRANSISTORS

CMUT5087E Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerCentral Semiconductor
package instructionSMALL OUTLINE, R-PDSO-F3
Contacts3
Reach Compliance Code_compli
ECCN codeEAR99
Other featuresLOW NOISE
Maximum collector current (IC)0.1 A
Collector-emitter maximum voltage50 V
ConfigurationSINGLE
Minimum DC current gain (hFE)50
JESD-30 codeR-PDSO-F3
JESD-609 codee0
Number of components1
Number of terminals3
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typePNP
Maximum power dissipation(Abs)0.35 W
Certification statusNot Qualified
surface mountYES
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formFLAT
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Transistor component materialsSILICON
Nominal transition frequency (fT)100 MHz
CMUT5087E PNP
CMUT5088E NPN
ENHANCED SPECIFICATION
SURFACE MOUNT
COMPLEMENTARY
SILICON TRANSISTORS
w w w. c e n t r a l s e m i . c o m
DESCRIPTION:
The CENTRAL SEMICONDUCTOR CMUT5087E and
CMUT5088E are Silicon transistors in an ULTRAmini™
surface mount package with enhanced specifications
designed for applications requiring high gain and low
noise.
MARKING CODES: CMUT5087E: U87
CMUT5088E: U88
SOT-523 CASE
MAXIMUM RATINGS:
(TA=25°C)
Collector-Base Voltage
Collector-Emitter Voltage
Emitter-Base Voltage
Continuous Collector Current
Power Dissipation
Operating and Storage Junction Temperature
Thermal Resistance
SYMBOL
VCBO
VCEO
VEBO
IC
PD
TJ, Tstg
Θ
JA
UNITS
V
V
V
mA
mW
°C
°C/W
50
50
5.0
100
350
-65 to +150
357
ELECTRICAL CHARACTERISTICS:
(TA=25°C unless otherwise noted)
SYMBOL
ICBO
IEBO
BVCBO
BVCEO
TEST CONDITIONS
VCB=20V
VEB=3.0V
IC=100µA
IC=1.0mA
IE=100µA
IC=10mA, IB=1.0mA
IC=100mA, IB=10mA
IC=10mA, IB=1.0mA
VCE=5.0V, IC=0.1mA
VCE=5.0V, IC=1.0mA
VCE=5.0V, IC=10mA
VCE=5.0V, IC=100mA
VCE=5.0V, IC=500µA, f=20MHz
VCB=5.0V, IE=0, f=1.0MHz
VBE=0.5V, IC=0, f=1.0MHz
VCE=5.0V,
VCE=5.0V,
IC=1.0mA, f=1.0kHz
IC=100μA, RS=10kΩ f=10Hz to 15.7kHz
MIN
TYP
NPN PNP
MAX
50
50
50
50
5.0
135
65
8.7
45
110
700
430
435
430
125
150
105
7.5
50
225
700
390
380
350
75
4.0
15
350
3.0
1400
dB
MHz
pF
pF
100
400
800
900
UNITS
nA
nA
V
V
V
mV
mV
mV
BVEBO
VCE(SAT)
♦♦
VCE(SAT)
VBE(SAT)
hFE
hFE
hFE
♦♦
hFE
fT
Cob
Cib
hfe
NF
300
300
300
50
100
Enhanced specification
♦♦
Additional Enhanced specification
R2 (9-February 2010)

CMUT5087E Related Products

CMUT5087E CMUT5088E CMUT5087E_10
Description ENHANCED SPECIFICATION SURFACE MOUNT COMPLEMENTARY SILICON TRANSISTORS ENHANCED SPECIFICATION SURFACE MOUNT COMPLEMENTARY SILICON TRANSISTORS ENHANCED SPECIFICATION SURFACE MOUNT COMPLEMENTARY SILICON TRANSISTORS
Is it lead-free? Contains lead Contains lead -
Is it Rohs certified? incompatible incompatible -
Maker Central Semiconductor Central Semiconductor -
package instruction SMALL OUTLINE, R-PDSO-F3 SMALL OUTLINE, R-PDSO-F3 -
Contacts 3 3 -
Reach Compliance Code _compli _compli -
ECCN code EAR99 EAR99 -
Other features LOW NOISE LOW NOISE -
Maximum collector current (IC) 0.1 A 0.1 A -
Collector-emitter maximum voltage 50 V 50 V -
Configuration SINGLE SINGLE -
Minimum DC current gain (hFE) 50 50 -
JESD-30 code R-PDSO-F3 R-PDSO-F3 -
JESD-609 code e0 e0 -
Number of components 1 1 -
Number of terminals 3 3 -
Maximum operating temperature 150 °C 150 °C -
Package body material PLASTIC/EPOXY PLASTIC/EPOXY -
Package shape RECTANGULAR RECTANGULAR -
Package form SMALL OUTLINE SMALL OUTLINE -
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED -
Polarity/channel type PNP NPN -
Maximum power dissipation(Abs) 0.35 W 0.35 W -
Certification status Not Qualified Not Qualified -
surface mount YES YES -
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) -
Terminal form FLAT FLAT -
Terminal location DUAL DUAL -
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED -
Transistor component materials SILICON SILICON -
Nominal transition frequency (fT) 100 MHz 100 MHz -

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