ICS9112-18
Z
ERO
D
ELAY
, L
OW
S
KEW
B
UFFER
Description
The ICS9112-18 is a low jitter, low skew, high
performance Phase Lock Loop (PLL) based zero delay
buffer for high speed applications. Based on ICS’
proprietary low jitter PLL techniques, the device
provides eight low skew outputs at speeds up to 160
MHz at 3.3V. The ICS9112-18 includes a bank of four
outputs running at 1/2X. In the zero delay mode, the
rising edge of the input clock is aligned with the rising
edges of all eight outputs. Compared to competitive
CMOS devices, the ICS9112-18 has the lowest jitter.
ICS manufactures the largest variety of clock
generators and buffers and is the largest clock supplier
in the world.
Features
•
•
•
•
•
•
•
Packaged in 16 pin SOIC
Zero input-output delay
Four 1X outputs plus four 1/2X outputs
Output to output skew is less than 250 ps
Output clocks up to 160 MHz at 3.3V
Ability to generate 2X the input
Full CMOS outputs with 18 mA output drive
capability at TTL levels at 3.3V
spectrum clock generators
•
Spread Smart
TM
technology works with spread
•
Advanced, low power, sub micron CMOS process
•
Operating voltage of 3.3V or 5V
Block Diagram
VDD
2
CLKA1
FBIN
PLL
CLKIN
CLKA3
CLKA4
CLKA2
/2
CLKB1
CLKB2
S1, S0
2
Control
Logic
CLKB3
CLKB4
2
GND
MDS 9112-18 G
In tegr ated C ir cu it S yst ems
q
1
5 25 Ra ce Str eet, San Jose, C A 95 126
q
Revision 121302
tel ( 408) 2 95-9 800
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www. i c s t. c om
ICS9112-18
Z
ERO
D
ELAY
, L
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S
KEW
B
UFFER
Pin Assignment
CLKIN
CLKA1
CLKA2
VDD
GND
CLKB1
CLKB2
S2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
FBIN
CLKA4
CLKA3
VDD
GND
CLKB4
CLKB3
S1
Feedback Configuration Table
Feedback From
Bank A
Bank B
CLKA1:A4
CLKIN
2XCLKIN
CLKB1:B4
CLKIN/2
CLKIN
16 Pin (150 mil) SOIC
Output Clock Mode Select Table
S2
0
0
1
1
S1
0
1
0
1
Clocks A1:A4
Clocks B1:B4
Internet Generation
Tri-state (high impedance) Tri-state (high impedance)
None
Running
Tri-state (high impedance)
PLL
Running
Running
Buffer only (no zero delay)
Running
Running
PLL
PLL Status
On
On
Off
On
Pin Descriptions
Pin
Number
1
2-3
4
5
6-7
8
9
10 - 11
12
13
14 - 15
16
Pin
Name
CLKIN
CLKA1:A4
VDD
GND
CLKB1:B4
S2
S1
CLKB1:B4
GND
VDD
CLKA1:A4
FBIN
Pin
Type
Input
Output
Power
Power
Output
Input
Input
Output
Power
Power
Output
Input
Pin Description
Clock input. Connect to input clock source.
Clock A bank of four outputs.
Power supply. Connect pin to same voltage as pin 13 (either 3.3V or 5V).
Connect to ground.
Clock B bank of four outputs. These are low skew divide by two of bank A.
Select input 2. Selects mode for outputs per table above.
Select input 1. Selects mode for outputs per table above.
Clock B bank of four outputs. These are low skew divide by two of bank A.
Connect to ground.
Power supply. Connect pin to same voltage as pin 4 (either 3.3V or 5V).
Clock A bank of four outputs.
Feedback input. Determines outputs per table above.
MDS 9112-18 G
Int egrat ed C ircuit Syste ms
q
2
525 R ace S tr eet, San Jose, CA 95126
q
Revision 121302
t el (40 8) 295 -9800
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w ww. ic s t .c o m
ICS9112-18
Z
ERO
D
ELAY
, L
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S
KEW
B
UFFER
External Components
The ICS9112-18 requires a minimum number of external components for proper operation. Decoupling
capacitors of 0.1
µF
should be connected between VDD and GND, as close to the part as possible. A 33
Ω
series terminating resistor should be used on each clock output to reduce reflections.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS9112-18. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature
7V
Rating
-0.5 V to VDD+0.5 V
0 to +70
°C
-65 to +150
°C
175
°C
260
°C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Min.
0
+3.0
Typ.
Max.
+70
+5.5
Units
°C
V
DC Electrical Characteristics
VDD=3.3 V ±10%
, Ambient temperature 0 to +70°C
Parameter
Operating Voltage
Input High Voltage
Input Low Voltage
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage
Symbol
VDD
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
V
OH
Conditions
CLKIN pin only
CLKIN pin only
Min.
3.0
(VDD/2)+1
2
Typ.
VDD/2
VDD/2
Max.
5.5
(VDD/2)-1
0.8
Units
V
V
V
V
V
V
V
V
I
OH
= -18mA
I
OL
= 18mA
I
OH
= -5mA
2.4
0.4
VDD-0.4
MDS 9112-18 G
Int egrat ed C ircuit Syste ms
q
3
525 R ace S tr eet, San Jose, CA 95126
q
Revision 121302
t el (40 8) 295 -9800
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ICS9112-18
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Parameter
Operating Supply Current
Short Circuit Current
Input Capacitance
Symbol
IDD
I
OS
C
IN
Conditions
No Load
S1=S2=1
Each output
S1, S1, FBIN
Min.
Typ.
44
± 65
7
Max.
Units
mA
mA
pF
AC Electrical Characteristics
VDD = 3.3V ±10%
, Ambient Temperature 0 to +70° C
Parameter
Input Frequency
Output Frequency
Output Rise Time
Output Fall Time
Output Clock Duty Cycle
Device to Device skew, equally
loaded
Output to Output skew, equally
loaded
Maximum Absolute Jitter
Cycle to Cycle Jitter
30pF loads
66.67 MHz outputs
t
OR
t
OF
Symbol
Conditions
FBIN to CLKA1
S1=S2=1
FBIN to CLKA1
S1=S2=1
0.8 to 2.0 V, C
L
=30pF
0.8 to 2.0 V, C
L
=30pF
at 1.4V
rising edges at VDD/2
rising edges at VDD/2
Min.
20
20
Typ.
Max. Units
160
160
1.5
1.5
MHz
MHz
ns
ns
%
ps
ps
ps
400
ps
40
50
60
700
250
300
Thermal Characteristics
Parameter
Thermal Resistance Junction to
Ambient
Symbol
θ
JA
θ
JA
θ
JA
θ
JC
Conditions
Still air
1 m/s air flow
3 m/s air flow
Min.
Typ.
120
115
105
58
Max. Units
°C/W
°C/W
°C/W
°C/W
Thermal Resistance Junction to Case
MDS 9112-18 G
Int egrat ed C ircuit Syste ms
q
4
525 R ace S tr eet, San Jose, CA 95126
q
Revision 121302
t el (40 8) 295 -9800
q
w ww. ic s t .c o m
ICS9112-18
Z
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D
ELAY
, L
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S
KEW
B
UFFER
Package Outline and Package Dimensions
(16 pin SOIC, 150 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
Min
Max
Inches
Min
Max
Symbol
Index
A rea
E
H
P in 1
D
A
A1
B
C
D
E
e
H
h
L
a
1.35
1.75
.010
0.24
0.33
0.51
0.19
0.24
9.80
10.00
3.80
4.00
1.27 Basic
5.80
6.20
0.25
0.50
0.41
1.27
0°
8°
0.0532 0.0688
0.0040 0.0098
0.013
0.020
0.0075 0.0098
0.3859 0.3937
0.1497 0.1574
0.050 Basic
0.2284 0.2440
0.0099 0.0195
0.016
0.050
0°
8°
a
e
b
c
L
A
Ordering Information
Part / Order Number
ICS9112BM-18
IICS9112BM-18T
Marking
9112BM-18
9112BM-18
Shipping
packaging
Tubes
Tape and Reel
Package
16 pin SOIC
16 pin SOIC
Temperature
0 to 70° C
0 to 70° C
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no
responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other
circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those
requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without
additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not aut orize or warrant
h
any ICS product for use in life support devices or critical medical instruments.
MDS 9112-18 G
Int egrat ed C ircuit Syste ms
q
5
525 R ace S tr eet, San Jose, CA 95126
q
Revision 121302
t el (40 8) 295 -9800
q
w ww. ic s t .c o m
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