Component Recognition Program File Number: E207481
Rated 2500V
RMS
for 1 minute
Soldering Profile
Per JEDEC J-STD-020C, MSL=2
2
NVE Corporation
11409 Valley View Road
Eden Prairie, MN 55344-3617 USA
Telephone: (952) 829-9217
Fax (952) 829-9189
Internet: www.isoloop.com
IL485
IL485 Pin Connections
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
V
DD1
GND
1
R
RE
DE
D
NC
GND
1
GND
2
ISODE
NC
A
B
NC
GND
2
V
DD2
Input Power Supply
Input Power Supply Ground Return
Output Data from Bus
Read Data Enable
(if RE is high, R = high impedance)
Drive Enable
Data Input to Bus
No Internal Connection
Input Power Supply Ground Return
Output Power Supply Ground Return
Isolated DE Output for use in Profibus
applications where the state of the isolated
drive enable node needs to be monitored
No Internal Connection
Non-inverting Bus Line
Inverting Bus Line
No Internal Connection
Output Power Supply Ground Return.
Output Power Supply
GND
1
GND
2
RE
DE
D
NC
B
A
NC
ISODE
VDD
1
GND
1
R
VDD
2
GND
2
NC
3
NVE Corporation
11409 Valley View Road
Eden Prairie, MN 55344-3617 USA
Telephone: (952) 829-9217
Fax (952) 829-9189
Internet: www.isoloop.com
IL485
Driver Section
Electrical Specifications are T
min
to T
max
and V
DD
= 4.5 V to 5.5 V, unless otherwise stated.
Parameters
Symbol
Min.
Typ.
(5)
Input Clamp Voltage
V
IK
Output voltage
V
O
0
(2)
Differential Output Voltage
|V
OD
1
|
1.5
(2)
Differential Output Voltage
|V
OD
2
|
1.5
2.5
(2)(6)
Differential Output Voltage
V
OD
3
1.5
Change in Magnitude of Differential
Δ|V
OD
|
Output Voltage
(7)
Common Mode Output Voltage
Change in Magnitude of Common
Mode Output Voltage
(7)
Output Current
(4)
Output Disabled
High Level Input Current
Low Level Input Current
Short-circuit Output Current
Supply Current
V
DD
1
= +5 V
V
DD
1
= +3.3 V
V
OC
Δ|V
OC
|
I
O
I
IH
I
IL
I
OS
I
DD
1
I
DD
1
Symbol
t
D
(OD)
t
S
(P)
t
T
(OD)
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SK
(LIM)
4
3
Switching Specifications
Min.
Typ.
(5)
35
16
1
8
31
22
28
16
2
Max.
−1.5
6
6
5
5
±0.2
3
−1
±0.2
1
−0.8
10
−10
250
−150
−250
6
4
Max.
25
6
10
65
35
50
32
12
Units
V
V
V
V
V
V
V
V
mA
μA
μA
mA
mA
Units
Mbps
ns
ns
ns
ns
ns
ns
ns
ns
Test Conditions
I
L
=
−18
mA
I
O
= 0
I
O
= 0
R
L
= 54
Ω,
V
DD
= 5 V
R
L
= 54
Ω,
V
DD
= 4.5 V
R
L
= 54
Ω
or 100
Ω
R
L
= 54
Ω
or 100
Ω
R
L
= 54
Ω
or 100
Ω
V
O
= 12 V
V
O
=
−7
V
V
I
= 3.5 V
V
I
= 0.4 V
V
O
=
−6
V
V
O
= 0 V
V
O
= 8 V
No Load
(Outputs Enabled)
Test Conditions
R
L
= 54
Ω,
C
L
= 50 pF
R
L
= 54
Ω,
C
L
= 50 pF
R
L
= 54
Ω,
C
L
= 50 pF
R
L
= 54
Ω,
C
L
= 50 pF
R
L
= 54
Ω,
C
L
= 50 pF
R
L
= 54
Ω,
C
L
= 50 pF
R
L
= 54
Ω,
C
L
= 50 pF
R
L
= 54
Ω,
C
L
= 50 pF
R
L
= 54
Ω,
C
L
= 50 pF
Parameters
Maximum Data Rate
Differential Output Prop Delay
Pulse Skew
(10)
Differential Output Rise & Fall Time
Output Enable Time To High Level
Output Enable Time To Low Level
Output Disable Time From High Level
Output Disable Time From Low Level
Skew Limit
(3)
Notes
(apply to both driver and receiver sections):
1.
2.
3.
4.
5.
6.
7.
8.
9.
All voltage values are with respect to network ground except differential I/O bus voltages.
Differential input/output voltage is measured at the noninverting terminal A with respect to the inverting terminal B.
Skew limit is the maximum propagation delay difference between any two devices at 25°C.
The power-off measurement in ANSI Standard EIA/TIA-422-B applies to disabled outputs only and
is not applied to combined inputs and outputs.
All typical values are at V
DD
1
,V
DD
2
= 5 V or V
DD
1
= 3.3 V and T
A
= 25°C.
The minimum V
OD
2
with a 100
Ω
load is either ½ V
OD
1
or 2 V, whichever is greater.
Δ|V
OD
| and
Δ|V
OC
| are the changes in magnitude of V
OD
and V
OC
, respectively,
that occur when the input is changed form one logic state to the other.
This applies for both power on and power off, refer to ANSI standard RS-485 for exact condition.
The EIA/TIA-422-B limit does not apply for a combined driver and receiver terminal.
Includes 8 ns read enable time. Maximum propagation delay is 25 ns after read assertion.
10. Pulse skew is defined as |t
PLH
−
t
PHL
| of each channel.
11. The relevant test and measurement methods are given in the Electromagnetic Compatibility section on p. 6.
12. External magnetic field immunity is improved by this factor if the field direction is “end-to-end” rather than to “pin-to-pin” (see diagram on p. 6).
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