R8C/33T Group
RENESAS MCU
R01DS0046EJ0110
Rev.1.10
Apr 26, 2011
1.
1.1
Overview
Features
The R8C/33T Group of single-chip MCUs incorporates the R8C CPU core, employing sophisticated instructions
for a high level of efficiency. With 1 Mbyte of address space, and it is capable of executing instructions at high
speed. In addition, the CPU core boasts a multiplier for high-speed operation processing.
Power consumption is low, and the supported operating modes allow additional power control. These MCUs are
designed to maximize EMI/EMS performance.
Integration of many peripheral functions, including multifunction timer and serial interface, reduces the number of
system components.
The R8C/33T Group has data flash (1 KB × 4 blocks) with the background operation (BGO) function.
1.1.1
Applications
Electronic household appliances, office equipment, audio equipment, consumer equipment, etc.
R01DS0046EJ0110 Rev.1.10
Apr 26, 2011
Page 1 of 47
R8C/33T Group
1. Overview
1.1.2
Specifications
Tables 1.1 and 1.2 outline the Specifications for R8C/33T Group.
Table 1.1
Item
CPU
Specifications for R8C/33T Group (1)
Function
Central processing
unit
Specification
R8C CPU core
• Number of fundamental instructions: 89
• Minimum instruction execution time:
50 ns (f(XIN) = 20 MHz, VCC = 2.7 V to 5.5 V)
200 ns (f(XIN) = 5 MHz, VCC = 1.8 V to 5.5 V)
• Multiplier: 16 bits × 16 bits
→
32 bits
• Multiply-accumulate instruction: 16 bits × 16 bits + 32 bits
→
32 bits
• Operation mode: Single-chip mode (address space: 1 Mbyte)
Refer to
Table 1.3 Product List for R8C/33T Group.
• Power-on reset
• Voltage detection 3 (detection level of voltage detection 0 and voltage
detection 1 selectable)
• Input-only: 1 pin
• CMOS I/O ports: 27, selectable pull-up resistor
• High current drive ports: 27
• 3 circuits: XIN clock oscillation circuit,
High-speed on-chip oscillator (with frequency adjustment function),
Low-speed on-chip oscillator
• Oscillation stop detection: XIN clock oscillation stop detection function
• Frequency divider circuit: Dividing selectable 1, 2, 4, 8, and 16
• Low power consumption modes:
Standard operating mode (high-speed clock, high-speed on-chip oscillator,
low-speed on-chip oscillator), wait mode, stop mode
• Number of interrupt vectors: 69
• External Interrupt: 7 (INT × 4, Key input × 4)
• Priority levels: 7 levels
• 14 bits × 1 (with prescaler)
• Reset start selectable
• Low-speed on-chip oscillator for watchdog timer selectable
• 1 channel
• Activation sources: 22
• Transfer modes: 2 (normal mode, repeat mode)
8 bits × 1 (with 8-bit prescaler)
Timer mode (period timer), pulse output mode (output level inverted every
period), event counter mode, pulse width measurement mode, pulse period
measurement mode
8 bits × 1 (with 8-bit prescaler)
Timer mode (period timer), programmable waveform generation mode (PWM
output), programmable one-shot generation mode, programmable wait one-
shot generation mode
16 bits × 1 (with 4 capture/compare registers)
Timer mode (input capture function, output compare function), PWM mode
(output 3 pins), PWM2 mode (PWM output pin)
ROM, RAM,
Data flash
Power Supply Voltage detection
Voltage
circuit
Detection
I/O Ports
Programmable I/O
ports
Clock
Clock generation
circuits
Memory
Interrupts
Watchdog Timer
DTC (Data Transfer Controller)
Timer
Timer RA
Timer RB
Timer RC
R01DS0046EJ0110 Rev.1.10
Apr 26, 2011
Page 2 of 47
R8C/33T Group
1. Overview
Table 1.2
Item
Serial
Interface
LIN Module
A/D Converter
Specifications for R8C/33T Group (2)
Function
UART0
UART2
Specification
Clock synchronous serial I/O/UART
Clock synchronous serial I/O/UART, I
2
C mode (I
2
C-bus), SSU mode,
multiprocessor communication function
Hardware LIN: 1 (timer RA, UART0)
10-bit resolution × 12 channels, includes sample and hold function, with sweep
mode
System CH × 3, electrostatic capacitive touch detection × 18
• Programming and erasure voltage: VCC = 2.7 V to 5.5 V
• Programming and erasure endurance: 10,000 times (data flash)
1,000 times (program ROM)
• Program security: ROM code protect, ID code check
• Debug functions: On-chip debug, on-board flash rewrite function
• Background operation (BGO) function
f(XIN) = 20 MHz (VCC = 2.7 V to 5.5 V)
f(XIN) = 5 MHz (VCC = 1.8 V to 5.5 V)
Typ. 6.5 mA (VCC = 5.0 V, f(XIN) = 20 MHz)
Typ. 3.5 mA (VCC = 3.0 V, f(XIN) = 10 MHz)
Typ. 3.5
µA
(VCC = 3.0 V, wait mode)
Typ. 2.0
µA
(VCC = 3.0 V, stop mode)
−20
to 85°C (N version)
32-pin LQFP
Package code: PLQP0032GB-A (previous code: 32P6U-A)
Sensor Control Unit
Flash Memory
Operating Frequency/Supply
Voltage
Current Consumption
Operating Ambient Temperature
Package
R01DS0046EJ0110 Rev.1.10
Apr 26, 2011
Page 3 of 47
R8C/33T Group
1. Overview
1.2
Product List
Table 1.3 lists Product List for R8C/33T Group. Figure 1.1 shows a Part Number, Memory Size, and Package of
R8C/33T Group.
Table 1.3
Product List for R8C/33T Group
ROM Capacity
Program ROM
Data flash
16 Kbytes
1 Kbyte × 4
24 Kbytes
1 Kbyte × 4
32 Kbytes
1 Kbyte × 4
16 Kbytes
1 Kbyte × 4
24 Kbytes
1 Kbyte × 4
32 Kbytes
1 Kbyte × 4
RAM
Capacity
1.5 Kbytes
2 Kbytes
2.5 Kbytes
1.5 Kbytes
2 Kbytes
2.5 Kbytes
Current of Apr 2011
Package Type
PLQP0032GB-A
PLQP0032GB-A
PLQP0032GB-A
PLQP0032GB-A
PLQP0032GB-A
PLQP0032GB-A
Remarks
N version
Part No.
R5F21334TNFP
R5F21335TNFP
R5F21336TNFP
R5F21334TNXXXFP
R5F21335TNXXXFP
R5F21336TNXXXFP
N version
Factory-
programming
product
(1)
Note:
1. The user ROM is programmed before shipment.
Part No. R 5 F 21 33 6 T N XXX FP
Package type:
FP: PLQP0032GB-A (0.8 mm pin-pitch, 7 mm square body)
ROM number
Classification
N: Operating ambient temperature
−20°C
to 85°C
ROM capacity
4: 16 KB
5: 24 KB
6: 32 KB
R8C/33T Group
R8C/3x Series
Memory type
F: Flash memory
Renesas MCU
Renesas semiconductor
Figure 1.1
Part Number, Memory Size, and Package of R8C/33T Group
R01DS0046EJ0110 Rev.1.10
Apr 26, 2011
Page 4 of 47
R8C/33T Group
1. Overview
1.3
Block Diagram
Figure 1.2 shows a Block Diagram.
8
8
3
5
3
1
I/O ports
Peripheral functions
Timers
Timer RA (8 bits
×
1)
Timer RB (8 bits
×
1)
Timer RC (16 bits
×
1)
Port P0
Port P1
Port P2
Port P3
Port P4
UART or
clock synchronous serial I/O
(8 bits
×
2)
LIN module
System clock generation
circuit
XIN-XOUT
High-speed on-chip oscillator
Low-speed on-chip oscillator
Sensor Control Unit
Watchdog timer
(14 bits)
Low-speed on-chip oscillator
for watchdog timer
A/D converter
(10 bits
×
12 channels)
Voltage detection circuit
DTC
R8C CPU core
R0H
R1H
R2
R3
A0
A1
FB
R0L
R1L
SB
USP
ISP
INTB
PC
FLG
Memory
ROM
(1)
RAM
(2)
Multiplier
Notes:
1. ROM size varies with MCU type.
2. RAM size varies with MCU type.
Figure 1.2
Block Diagram
R01DS0046EJ0110 Rev.1.10
Apr 26, 2011
Page 5 of 47
Embedded System
京公网安备 11010802033920号
EEWORLD
