Smart Low Side Power Switch
HITFET BTS 3118N
Features
·
Logic Level Input
·
Input Protection (ESD)
·
Thermal shutdown
•
Green product (RoHS compliant)
·
Overload protection
·
Short circuit protection
·
Overvoltage protection
·
Current limitation
·
Analog driving possible
Product Summary
Drain source voltage
On-state resistance
Nominal load current
Clamping energy
V
DS
R
DS(on)
I
D(Nom)
E
AS
42
100
2.17
250
V
A
m
mJ
4
3
2
1
VPS05163
Application
All kinds of resistive, inductive and capacitive loads in switching
or linear applications
µC compatible power switch for 12 V DC applications
Replaces electromechanical relays and discrete circuits
General Description
technology. Fully protected by embedded
V
bb
HITFET
Current
Limitation
In
Pin 1
Overvoltage-
Protection
Gate-Driving
Unit
Over-
temperature
Protection
ESD
Overload
Protection
Short circuit
Protection
Pin 3
Source
Datasheet
1
N channel vertical power FET in Smart SIPMOS
protection functions.
M
Drain
Pin 2 and 4 (TAB)
Rev. 1.3, 2008-04-14
Smart Low Side Power Switch
HITFET BTS 3118N
Maximum Ratings at T
j
= 25°C, unless otherwise specified
Parameter
Symbol
Drain source voltage
Drain source voltage for short circuit protection
T
j
= -40...150°C
Continuous input current
V
IN
< -0.2V or
V
IN
> 10V
Operating temperature
Storage temperature
Power dissipation
T
C
= 85 °C
Unclamped single pulse inductive energy
1)
Load dump protection
V
LoadDump2)
=
V
A
+
V
S
V
IN
= 0 and 10 V, t
d
= 400 ms,
R
I
= 2 ,
E
AS
V
LD
I
IN
V
DS
V
DS(SC)
Value
42
20
Unit
V
mA
no limit
|
I
IN
|
2
°C
W
mJ
V
T
j
T
stg
P
tot
-40 ...+150
-55 ... +150
3.8
250
50
Electrostatic discharge
voltage
(Human Body Model)
V
ESD
according to MIL STD 883D, method 3015.7 and
EOS/ESD assn. standard S5.1 - 1993
Thermal resistance
junction - ambient:
@ min. footprint
@ 6 cm
2
cooling area
3)
junction-soldering point:
R
thJS
R
thJA
125
72
17
K/W
K/W
1 Not tested, specified by design.
2
V
Loaddump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
3 Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for drain
connection. PCB mounted vertical without blown air.
Datasheet
R
L
= 6
,
V
A
= 13.5 V
2
2
-0.2V
V
IN
10V
kV
Rev. 1.3, 2008-04-14
Smart Low Side Power Switch
HITFET BTS 3118N
Electrical Characteristics
Parameter
at
T
j
= 25°C, unless otherwise specified
Characteristics
Drain source clamp voltage
T
j
= - 40 ...+ 150,
I
D
= 10 mA
Off-state drain current
T
j
= -40 ... +150°C
V
DS
= 32 V,
V
IN
= 0 V
Input threshold voltage
I
D
= 0.6 mA,
T
j
= 25 °C
I
D
= 0.6 mA,
T
j
= 150 °C
On state input current
On-state resistance
V
IN
= 5 V,
I
D
= 2.17 A,
T
j
= 25 °C
V
IN
= 5 V,
I
D
= 2.17 A,
T
j
= 150 °C
On-state resistance
V
IN
= 10 V,
I
D
= 2.17 A,
T
j
= 25 °C
V
IN
= 10 V,
I
D
= 2.17 A,
T
j
= 150 °C
Nominal load current
V
DS
= 0.5 V,
T
j
< 150°C,
V
IN
= 10 V,
T
A
= 85 °C
Current limit (active if
V
DS
>2.5 V)
1)
V
IN
= 10 V,
V
DS
= 12 V,
t
m
= 200 µs
I
D(Nom)
2.17
I
D(lim)
10
-
15
-
20
R
DS(on)
-
-
70
130
100
200
A
I
IN(on)
R
DS(on)
-
-
90
160
120
240
V
IN(th)
1.3
0.8
-
1.7
-
10
2.2
-
30
µA
V
V
DS(AZ)
I
DSS
42
-
-
1.5
55
10
V
µA
Symbol
min.
Values
typ.
max.
Unit
1Device switched on into existing short circuit (see diagram Determination of I
D(lim)). If the device is in on condit
and a short circuit occurs, these values might be exceeded for max. 50 µs.
Datasheet
3
Rev. 1.3, 2008-04-14
m
Smart Low Side Power Switch
HITFET BTS 3118N
Electrical Characteristics
Parameter
at
T
j
= 25°C, unless otherwise specified
Dynamic Characteristics
V
IN
to 90%
I
D
:
R
L
= 4.7 ,
V
IN
= 0 to 10 V,
V
bb
= 12 V
Turn-off time
V
IN
to 10%
I
D
:
Turn-on time
t
on
t
off
-dV
DS
/dt
on
dV
DS
/dt
off
-
-
-
-
40
70
0.4
0.6
100
100
1.5
1.5
V/µs
µs
Symbol
min.
Values
typ.
max.
Unit
Protection Functions
1)
Thermal overload trip temperature
Input current protection mode
Input current protection mode
T
j
= 150 °C
Unclamped single pulse inductive energy
2)
I
D
= 2.17 A,
T
j
= 25 °C,
V
bb
= 12 V
E
AS
250
-
-
mJ
T
jt
I
IN(Prot)
I
IN(Prot)
150
60
-
175
120
100
-
300
300
°C
µA
Inverse Diode
Inverse diode forward voltage
I
F
= 10.9 A,
t
m
= 250 µs,
V
IN
= 0 V,
t
P
= 300 µs
1Integrated protection functions are designed to prevent IC destruction under fault conditions
described in the data sheet. Fault conditions are considered as "outside" normal operating range.
Protection functions are not designed for continuous repetitive operation.
2 Not tested, specified by design.
Datasheet
R
L
= 4.7
R
L
= 4.7
,
V
IN
= 0 to 10 V,
V
bb
= 12 V
Slew rate off
50 to 70%
V
bb
:
,
V
IN
= 10 to 0 V,
V
bb
= 12 V
R
L
= 4.7
,
V
IN
= 10 to 0 V,
V
bb
= 12 V
Slew rate on
70 to 50%
V
bb
:
V
SD
-
1
-
V
4
Rev. 1.3, 2008-04-14
Smart Low Side Power Switch
HITFET BTS 3118N
Block diagram
Terms
Inductive and overvoltage
output clamp
RL
V
I IN
1
IN
HITFET
S
VIN
3
2
D
ID
VDS
Vbb
Z
D
S
HITFET
Input circuit (ESD protection)
V
Gate Drive
Input
Short circuit behaviour
IN
I
IN
t
Source/
Ground
I
D
t
T
t
j
t
Datasheet
5
Rev. 1.3, 2008-04-14
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