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Datasheet> All Categories > Discrete semiconductor> The transistor> FRM240D
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FRM240D

Description
Power Field-Effect Transistor, 16A I(D), 200V, 0.24ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-204AA
CategoryDiscrete semiconductor    The transistor   
File Size326KB，8 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
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FRM240D Overview

Power Field-Effect Transistor, 16A I(D), 200V, 0.24ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-204AA

FRM240D Parametric

Parameter NameAttribute value
MakerFairchild
package instructionFLANGE MOUNT, O-MBFM-P2
Reach Compliance Codeunknown
ECCN codeEAR99
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage200 V
Maximum drain current (ID)16 A
Maximum drain-source on-resistance0.24 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JEDEC-95 codeTO-204AA
JESD-30 codeO-MBFM-P2
Number of components1
Number of terminals2
Operating modeENHANCEMENT MODE
Package body materialMETAL
Package shapeROUND
Package formFLANGE MOUNT
Polarity/channel typeN-CHANNEL
Maximum pulsed drain current (IDM)48 A
Certification statusNot Qualified
surface mountNO
Terminal formPIN/PEG
Terminal locationBOTTOM
transistor applicationsSWITCHING
Transistor component materialsSILICON

FRM240D Preview

FRM240D, FRM240R,
FRM240H
June 1998
16A, 200V, 0.24 Ohm, Rad Hard,
N-Channel Power MOSFETs
Package
TO-204AA
Features
Title
RM2
D,
M2
R,
M2
H)
b-
t
A,
0V,
4
m,
d
rd,
an-
wer
OS-
Ts)
utho
ey-
rds
ter-
rpo-
on,
mi-
n-
ctor,
A,
0V,
4
m,
d
rd,
• 16A, 200V, RDS(on) = 0.24
Ω
• Second Generation Rad Hard MOSFET Results From New Design Concepts
• Gamma
-
-
-
-
-
Meets Pre-Rad Specifications to 100KRAD(Si)
Defined End Point Specs at 300KRAD(Si) and 1000KRAD(Si)
Performance Permits Limited Use to 3000KRAD(Si)
Survives 3E9RAD(Si)/sec at 80% BVDSS Typically
Survives 2E12 Typically If Current Limited to IDM
• Gamma Dot
• Photo Current
• Neutron
- 5.0nA Per-RAD(Si)/sec Typically
- Pre-RAD Specifications for 1E13 Neutrons/cm
2
- Usable to 1E14 Neutrons/cm
2
Description
The Intersil Corporation has designed a series of SECOND GENERATION hard-
ened power MOSFETs of both N and P channel enhancement types with ratings
from 100V to 500V, 1A to 60A, and on resistance as low as 25m
Ω
. Total dose hard-
ness is offered at 100K RAD(Si) and 1000KRAD(Si) with neutron hardness rang-
ing from 1E13n/cm
2
for 500V product to 1E14n/cm
2
for 100V product. Dose rate
hardness (GAMMA DOT) exists for rates to 1E9 without current limiting and 2E12
with current limiting.
This MOSFET is an enhancement-mode silicon-gate power field effect transistor of
the vertical DMOS (VDMOS) structure. It is specially designed and processed to
exhibit minimal characteristic changes to total dose (GAMMA) and neutron (n
o
)
exposures. Design and processing efforts are also directed to enhance survival to
heavy ion (SEE) and/or dose rate (GAMMA DOT) exposure.
This part may be supplied as a die or in various packages other than shown above.
Reliability screening is available as either non TX (commercial), TX equivalent of
MIL-S-19500, TXV equivalent of MIL-S-19500, or space equivalent of
MIL-S-19500. Contact the Intersil High-Reliability Marketing group for any desired
deviations from the data sheet.
Symbol
Absolute Maximum Ratings
(TC = +25
o
C) Unless Otherwise Specified
FRM240D, R, H
200
200
16
10
48
±
20
125
50
1.00
48
16
48
-55 to +150
300
UNITS
V
V
A
A
A
V
W
W
W/
o
C
A
A
A
o
C
o
C
Drain-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS
Drain-Gate Voltage (RGS = 20k
Ω
). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Continuous Drain Current
TC = +25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID
TC = +100
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS
Maximum Power Dissipation
TC = +25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT
TC = +100
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT
Derated Above +25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Inductive Current, Clamped, L = 100
µ
H, (See Test Figure) . . . . . . . . . . . . . . . . . . . . . . . . . . ILM
Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IS
Pulsed Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISM
Operating And Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJC, TSTG
Lead Temperature (During Soldering)
Distance > 0.063 in. (1.6mm) From Case, 10s Max . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
©2001 Fairchild Semiconductor Corporation
FRM240D, FRM240R, FRM240H Rev. A
FRM240D, FRM240R, FRM240H
Pre-Radiation Electrical Specifications
TC = +25
o
C, Unless Otherwise Specified
LIMITS
PARAMETER
Drain-Source Breakdown Volts
Gate-Threshold Volts
Gate-Body Leakage Forward
Gate-Body Leakage Reverse
Zero-Gate Voltage
Drain Current
Rated Avalanche Current
Drain-Source On-State Volts
Drain-Source On Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Gate-Charge Threshold
Gate-Charge On State
Gate-Charge Total
Plateau Voltage
Gate-Charge Source
Gate-Charge Drain
Diode Forward Voltage
Reverse Recovery Time
Junction-To-Case
Junction-To-Ambient
SYMBOL
BVDSS
VGS(th)
IGSSF
IGSSR
IDSS1
IDSS2
IDSS3
IAR
VDS(on)
RDS(on)
td(on)
tr
td(off)
tf
QG(th)
QG(on)
QGM
VGP
QGS
QGD
VSD
TT
R
θ
jc
R
θ
ja
Free Air Operation
ID = 16A, VGD = 0
I = 16A; di/dt = 100A/
µ
s
VDD = 100V, ID = 16A
IGS1 = IGS2
0
≤
VGS
≤
20
TEST CONDITIONS
VGS = 0, ID = 1mA
VDS = VGS, ID = 1mA
VGS = +20V
VGS = -20V
VDS = 200V, VGS = 0
VDS = 160V, VGS = 0
VDS = 160V, VGS = 0, TC = +125
o
C
Time = 20
µ
s
VGS = 10V, ID = 16A
VGS = 10V, ID = 10A
VDD = 100V, ID = 16A
Pulse Width = 3
µ
s
Period = 300
µ
s, Rg = 25
Ω
0
≤
VGS
≤
10 (See Test Circuit)
MIN
200
2.0
-
-
-
-
-
-
-
-
-
-
-
-
1.5
29
57
3
7
15
0.6
-
-
-
MAX
-
4.0
100
100
1
0.025
0.25
48
4.03
0.240
52
264
ns
280
148
8
116
228
16
28
nc
60
1.8
400
1.0
30
V
ns
o
C/W
UNITS
V
V
nA
nA
mA
A
V
Ω
nc
V
V
DD
ELECTRONIC SWITCH OPENS
WHEN I
AS
IS REACHED
V
DS
L
V
DS
+
CURRENT I
TRANSFORMER
AS
R
L
-
V
GS
= 12V
DUT
0V
R
GS
0V
t
P
50Ω
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
V
GS
≤
20V
DUT
50Ω
+
V
DD
-
50V-150V
FIGURE 1. RESISTIVE SWITCHING TEST CIRCUIT
FIGURE 2. UNCLAMPED ENERGY TEST CIRCUIT
©2001 Fairchild Semiconductor Corporation
FRM240D, FRM240R, FRM240H Rev. A
FRM240D, FRM240R, FRM240H
Post-Radiation Electrical Specifications
TC = +25
o
C, Unless Otherwise Specified
LIMITS
PARAMETER
Drain-Source
Breakdown Volts
(Note 4, 6)
(Note 5, 6)
Gate-Source
Threshold Volts
(Note 4, 6)
(Note 3, 5, 6)
Gate-Body
Leakage Forward
(Note 4, 6)
(Note 5, 6)
Gate-Body
Leakage Reverse
(Note 2, 4, 6)
(Note 2, 5, 6)
Zero-Gate Voltage
Drain Current
(Note 4, 6)
(Note 5, 6)
Drain-Source
On-State Volts
(Note 1, 4, 6)
(Note 1, 5, 6)
Drain-Source
On Resistance
(Note 1, 4, 6)
(Note 1, 5, 6)
NOTES:
1. Pulse test, 300
µ
s max
2. Absolute value
3. Gamma = 300KRAD(Si)
4. Gamma = 10KRAD(Si) for “D”, 100KRAD(Si) for “R”. Neutron = 1E13
5. Gamma = 1000KRAD(Si). Neutron = 1E13
6. Insitu Gamma bias must be sampled for both VGS = +10V, VDS = 0V and VGS = 0V, VDS = 80% BVDSS
7. Gamma data taken 7/9/90 on TA 17642 devices by GE ASTRO SPACE; EMC/SURVIVABILITY LABORATORY; KING OF PRUSSIA, PA
19401
8. Single event drain burnout testing by Titus, J.L., et al of NWSC, Crane, IN at Brookhaven Nat. Lab. Dec 11-14, 1989
9. Neutron derivation, Intersil Application note AN-8831, Oct. 1988
SYMBOL
BVDSS
BVDSS
VGS(th)
VGS(th)
IGSSF
IGSSF
IGSSR
IGSSR
IDSS
IDSS
VDS(on)
VDS(on)
RDS(on)
RDS(on)
TYPE
FRM240D, R
FRM240H
FRM240D, R
FRM240H
FRM240D, R
FRM240H
FRM240D, R
FRM240H
FRM240D, R
FRM240H
FRM240D, R
FRM240H
FRM240D, R
FRM240H
TEST CONDITIONS
VGS = 0, ID = 1mA
VGS = 0, ID = 1mA
VGS = VDS, ID = 1mA
VGS = VDS, ID = 1mA
VGS = 20V, VDS = 0
VGS = 20V, VDS = 0
VGS = -20V, VDS = 0
VGS = -20V, VDS = 0
VGS = 0, VDS = 160V
VGS = 0, VDS = 160V
VGS = 10V, ID = 16A
VGS = 16V, ID = 16A
VGS = 10V, ID = 10A
VGS = 14V, ID = 10A
MIN
200
190
2.0
1.5
-
-
-
-
-
-
-
-
-
-
MAX
-
-
4.0
4.5
100
200
100
200
25
100
4.03
6.05
0.240
0.360
UNITS
V
V
V
V
nA
nA
nA
nA
µ
A
µ
A
V
V
Ω
Ω
©2001 Fairchild Semiconductor Corporation
FRM240D, FRM240R, FRM240H Rev. A
FRM240D, FRM240R, FRM240H
Typical Performance Characteristics
©2001 Fairchild Semiconductor Corporation
FRM240D, FRM240R, FRM240H Rev. A
FRM240D, FRM240R, FRM240H
Typical Performance Characteristics
(Continued)
©2001 Fairchild Semiconductor Corporation
FRM240D, FRM240R, FRM240H Rev. A
More (Only the first 5 pages are displayed. Please Download Datasheet to view the full content.) >

FRM240D Related Products

FRM240D FRM240R
Description Power Field-Effect Transistor, 16A I(D), 200V, 0.24ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-204AA Power Field-Effect Transistor, 16A I(D), 200V, 0.24ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-204AA
Maker Fairchild Fairchild
package instruction FLANGE MOUNT, O-MBFM-P2 FLANGE MOUNT, O-MBFM-P2
Reach Compliance Code unknown unknown
ECCN code EAR99 EAR99
Configuration SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage 200 V 200 V
Maximum drain current (ID) 16 A 16 A
Maximum drain-source on-resistance 0.24 Ω 0.24 Ω
FET technology METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
JEDEC-95 code TO-204AA TO-204AA
JESD-30 code O-MBFM-P2 O-MBFM-P2
Number of components 1 1
Number of terminals 2 2
Operating mode ENHANCEMENT MODE ENHANCEMENT MODE
Package body material METAL METAL
Package shape ROUND ROUND
Package form FLANGE MOUNT FLANGE MOUNT
Polarity/channel type N-CHANNEL N-CHANNEL
Maximum pulsed drain current (IDM) 48 A 48 A
Certification status Not Qualified Not Qualified
surface mount NO NO
Terminal form PIN/PEG PIN/PEG
Terminal location BOTTOM BOTTOM
transistor applications SWITCHING SWITCHING
Transistor component materials SILICON SILICON

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