80502600EB256 datasheet, PDF - EEWORLD Datasheet

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80502600EB256: DescriptionMicroprocessor, 32-Bit, 600MHz, CMOS, CPGA370, PGA-370; CategoryThe embedded processor and controller Microcontrollers and processors; File Size564KB，76 Pages; ManufacturerIntel; Websitehttp://www.intel.com/

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80502600EB256 Overview

Microprocessor, 32-Bit, 600MHz, CMOS, CPGA370, PGA-370

80502600EB256 Parametric

Parameter Name	Attribute value
Maker	Intel
Parts packaging code	PGA
package instruction	IPGA,
Contacts	370
Reach Compliance Code	compliant
ECCN code	3A001.A.3
Address bus width	34
bit size	32
boundary scan	YES
maximum clock frequency	600 MHz
External data bus width	64
Integrated cache	YES
JESD-30 code	S-CPGA-P370
length	49.53 mm
low power mode	YES
Number of terminals	370
Maximum operating temperature	85 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	IPGA
Package shape	SQUARE
Package form	GRID ARRAY, INTERSTITIAL PITCH
Certification status	Not Qualified
Maximum seat height	2.089 mm
speed	600 MHz
Nominal supply voltage	1.65 V
surface mount	NO
technology	CMOS
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
width	49.53 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR

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Pentium

III Processor for the PGA370

Socket at 500 MHz to 866 MHz

Product Features

Available in 866, 800EB, 733B, 667B,

600EB, and 533EB MHz speeds to support a

133MHz system bus ("E" denotes support

for Advanced Transfer Cache and Advanced

System Buffering; "B" denotes support for a

133 MHz system bus

See Table 1 for a summary of features for

each line item.)

Available in 850, 800, 750, 700, 650, 600E,

550E, and 500E MHz speeds for support of a

100 MHz system bus frequency (‘E’ denotes

support for Advanced Transfer Cache and

Advanced System Buffering)

Available in versions that incorporate

256 KB Advanced Transfer Cache (on-die,

full speed Level 2 (L2) cache with Error

Correcting Code (ECC))

Dual Independent Bus (DIB) architecture:

Separate dedicated external System Bus and

dedicated internal high-speed cache bus

Internet Streaming SIMD Extensions for

enhanced video, sound and 3D performance

Binary compatible with applications running

on previous members of the Intel

microprocessor line

Dynamic execution micro architecture

Intel Processor Serial Number

Power Management capabilities

— System Management mode

— Multiple low-power states

Optimized for 32-bit applications running on

advanced 32-bit operating systems

Flip Chip Pin Grid Array (FC-PGA) packaging

technology; FC-PGA processors deliver high

performance with improved handling protection

and socketability

Integrated high performance 16 KB instruction

and 16 KB data, nonblocking, level one cache

256 KB Integrated Full Speed level two cache

allows for low latency on read/store operations

Double Quad Word Wide(256bit) cache data

bus provides extremely high throughput on

read/store operations.

8-way cache associativity provides improved

cache hit rate on reads/store operations.

Error-correcting code for System Bus data

Enables systems which are scaleable for up to

two processors

The Pentium

III

processor is designed for high-performance desktops and for workstations and servers.

It is binary compatible with previous Intel Architecture processors. The Pentium

III

processor provides

great performance for applications running on advanced operating systems such as Windows* 98,

Windows NT and UNIX*. This is achieved by integrating the best attributes of Intel processors—the

dynamic execution, Dual Independent Bus architecture plus Intel MMX™ technology and Internet

Streaming SIMD Extentions—bringing a new level of performance for systems buyers. The Pentium

III

processor is scaleable to two processors in a multiprocessor system and extends the power of the

Pentium II processor with performance headroom for business media, communication and internet

capabilities. Systems based on Pentium

III

processors also include the latest features to simplify system

management and lower the cost of ownership for large and small business environments. The Pentium

III

processor offers great performance for today’s and tomorrow’s applications

FC-PGA Package

March 2000

Order Number:

245264-004

Pentium

III Processor for the PGA370 Socket at 500 MHz to 866 MHz

Contents

1.0

Introduction......................................................................................................................... 7

1.1

Terminology........................................................................................................... 8

1.1.1 Package and Processor Terminology ...................................................... 8

1.1.2 Processor Naming Convention.................................................................9

Related Documents.............................................................................................10

Processor System Bus and V

REF .......................................................................................... 11

Clock Control and Low Power States..................................................................12

2.2.1 Normal State—State 1 ...........................................................................13

2.2.2 AutoHALT Powerdown State—State 2...................................................13

2.2.3 Stop-Grant State—State 3 .....................................................................13

2.2.4 HALT/Grant Snoop State—State 4 ........................................................14

2.2.5 Sleep State—State 5..............................................................................14

2.2.6 Deep Sleep State—State 6 ....................................................................14

2.2.7 Clock Control..........................................................................................15

Power and Ground Pins ......................................................................................15

2.3.1 Phase Lock Loop (PLL) Power...............................................................16

Decoupling Guidelines .......................................................................................16

2.4.1 Processor VCC

CORE

Decoupling............................................................16

2.4.2 Processor System Bus AGTL+ Decoupling............................................16

Processor System Bus Clock and Processor Clocking .......................................17

2.5.1 Mixing Processors of Differrent Frequencies .........................................17

Voltage Identification ...........................................................................................17

Processor System Bus Unused Pins...................................................................19

Processor System Bus Signal Groups ................................................................19

2.8.1 Asynchronous vs. Synchronous for System Bus Signals .......................20

2.8.2 System Bus Frequency Select Signals (BSEL[1:0]) ...............................21

Test Access Port (TAP) Connection....................................................................22

Maximum Ratings................................................................................................22

Processor DC Specifications...............................................................................23

AGTL+ System Bus Specifications .....................................................................26

System Bus AC Specifications ............................................................................26

2.13.1 I/O Buffer Model Password ....................................................................27

BCLK and PICCLK Signal Quality Specifications and Measurement

Guidelines ...........................................................................................................34

AGTL+ Signal Quality Specifications and Measurement Guidelines ..................35

AGTL+ Signal Quality Specifications and Measurement Guidelines ..................36

3.3.1 Overshoot/Undershoot Guidelines .........................................................36

3.3.2 Overshoot/Undershoot Magnitude .........................................................36

3.3.3 Overshoot/Undershoot Pulse Duration...................................................37

3.3.4 Activity Factor .........................................................................................37

3.3.5 Reading Overshoot/Undershoot Specification Tables............................38

3.3.6 Determining if a System meets the Overshoot/Undershoot

Specifications .........................................................................................39

1.2

2.0

2.1

2.2

Electrical Specifications....................................................................................................11

2.3

2.4

2.5

2.6

2.7

2.8

2.9

2.10

2.11

2.12

2.13

3.0

Signal Quality Specifications ............................................................................................34

3.1

3.2

3.3

Datasheet

Pentium

III Processor for the PGA370 Socket at 500 MHz to 866 MHz

3.4

Non-AGTL+ Signal Quality Specifications and Measurement Guidelines........... 41

3.4.1 Overshoot/Undershoot Guidelines ......................................................... 42

3.4.2 Ringback Specification........................................................................... 42

3.4.3 Settling Limit Guideline .......................................................................... 42

Thermal Specifications........................................................................................ 43

4.1.1 Thermal Diode........................................................................................ 44

FC-PGA Mechanical Specifications .................................................................... 46

Processor Markings ............................................................................................ 48

Processor Signal Listing...................................................................................... 48

Mechanical Specifications................................................................................... 60

6.1.1 Boxed Processor Thermal Cooling Solution Dimensions....................... 60

6.1.2 Boxed Processor Heatsink Weight......................................................... 62

6.1.3 Boxed Processor Thermal Cooling Solution Clip ................................... 62

6.1.4 Heatsink Grounding for the Boxed Processor ........................................ 63

Boxed Processor Requirements ......................................................................... 63

6.2.1 Fan Heatsink Power Supply ................................................................... 63

Thermal Specifications........................................................................................ 64

6.3.1 Boxed Processor Cooling Requirements ............................................... 64

Alphabetical Signals Reference .......................................................................... 66

Signal Summaries ............................................................................................... 73

4.0

Thermal Specifications and Design Considerations......................................................... 43

4.1

5.0

Mechanical Specifications............................................................................................... 46

5.1

5.2

5.3

6.0

Boxed Processor Specifications....................................................................................... 60

6.1

6.2

6.3

7.0

Processor Signal Description ........................................................................................... 66

7.1

7.2

Datasheet

Pentium

III Processor for the PGA370 Socket at 500 MHz to 866 MHz

List of Figures

Second Level (L2) Cache Implementation ........................................................... 7

AGTL+ Bus Topology in a Uniprocessor Configuration ......................................12

AGTL+ Bus Topology in a Dual-Processor Configuration ...................................12

Stop Clock State Machine ...................................................................................12

Processor Vcc

CMOS

Package Routing ................................................................16

BSEL[1:0] Example for a 100/133 MHz or 100 MHz Only System Design .........21

BCLK, PICCLK, and TCK Generic Clock Waveform...........................................31

System Bus Valid Delay Timings ........................................................................31

System Bus Setup and Hold Timings..................................................................31

System Bus Reset and Configuration Timings....................................................32

Power-On Reset and Configuration Timings.......................................................32

Test Timings (TAP Connection) ..........................................................................33

Test Reset Timings .............................................................................................33

BCLK, PICCLK Generic Clock Waveform at the Processor Pins........................34

Low to High AGTL+ Receiver Ringback Tolerance.............................................35

Maximum Acceptable AGTL+ Overshoot/Undershoot Waveform .......................41

Non-AGTL+ Overshoot/Undershoot, Settling Limit, and Ringback 1 ..................41

Processor Functional Die Layout ........................................................................44

Package Dimensions...........................................................................................46

Top Side Processor Markings .............................................................................48

Intel

Pentium

III Processor Pinout ...................................................................49

Conceptual Boxed Intel

Pentium

III Processor for the PGA370 Socket ..........60

Side View of Space Requirements for the Boxed Processor ..............................61

Dimensions of Mechanical Step Feature in Heatsink Base.................................62

Clip Keepout Requirements and Recommended EMI Ground Pad

Location for Boxed Intel

Pentium

III Processors .............................................62

Boxed Processor Fan Heatsink Power Cable Connector Description.................63

Motherboard Power Header Placement Relative to the Boxed

Intel

Pentium

III Processor ..............................................................................64

Thermal Airspace Requirement for all Boxed Intel

Pentium

III Processor

Fan Heatsinks in the PGA370 Socket .................................................................65

Datasheet

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