through E, in particular the input surge requirement
of 80 volts specified in MIL-STD-704A.
The
converters are designed to withstand transient input
voltage of 80 volts. No input voltage or output
power derating is necessary over the full military
temperature range.
These converters are packaged in an extremely
rugged, low profile package that meets all
requirements of MIL-STD-883 and MIL-PRF-38534.
Parallel seam weld sealing and the use of ceramic
pin feedthru seals assure long term hermeticity after
exposure to extended temperature cycling.
The basic circuit is a push-pull forward topology
using power MOSFET switches.
The nominal
switching frequency is 500 KHz. A unique current
injection circuit assures current balancing in the
power switches. All AHV series converters use a
single stage LC input filter to attenuate input ripple
current. A low power 11.5 volt series regulator
provides power to an epitaxial CMOS custom pulse
width modulator integrated circuit.
This single
integrated circuit provides all PWM primary circuit
functions. Power is transferred from primary to
secondary through a ferrite core power transformer.
An error voltage signal is generated by comparing a
highly stable reference voltage with the converter
output voltage and drives the PWM through a
unique wideband magnetic feedback circuit. This
proprietary feedback circuit provides an extremely
wide bandwidth, high gain control loop, with high
phase margin. The feedback control loop gain is
insensitive to temperature, radiation, aging, and
variations in manufacturing. The transfer function of
the feedback circuit is a function of the feedback
transformer turns ratio which cannot change when
subjected to enviromental extremes.
the requirements of MIL-PRF-38534 for class H.
The HB grade is processed and screened to the
class H requirement, but may not necessarily meet
all of the other MIL-PRF-38534 requirements, e.g.,
element evaluation and Periodic Inspection (P.I.)
not required. Both grades are tested to meet the
complete group "A" test specification over the full
military temperature range without output power
deration. Two grades with more limited screening
are also available for use in less demanding
applications. Variations in electrical, mechanical
and screening can be accommodated. Contact
Lambda Advanced Analog for special requirements.
FEATURES
n
n
n
n
n
n
n
n
n
n
n
n
n
80 Transient (100 msec max.) Absolute
Maximum Input
50 V
DC
Absolute Maximum Input
(Continuous)
16-40 V
DC
Input Range
Single, Dual, and Triple Outputs
15 Watt Output Power (No Temperature
Derating)
Low Input/Output Noise
Full Military Temperature Range
Wideband PWM Control Loop
Magnetic Feedback
Low Profile Hermetic Package (.405”)
Short Circuit and Overload Protection
Constant Switching Frequency (500 KHz)
True Hermetic Package (Parallel Seam
Welded, Ceramic Pin Feedthru
Manufactured in a facility fully qualified to MIL-PRF-
38534, these converters are available in four
screening grades to satisfy a wide range of
requirements. The CH grade is fully compliant to
SPECIFICATIONS (SINGLE OUTPUT MODELS)
T
CASE
= -55°C to +125°C, V
IN
= +28 V ±5% unless otherwise specified
ABSOLUTE MAXIMUM RATINGS
Input Voltage
Power Output
Soldering
Temperature Range
-0.5 V to 50 VDC (Continuous) 80 V (100ms)
Internally limited, 17.5W typical
300°C for 10 seconds (1 pin at a time)
Operating
-55°C to 135°C case
9
Storage -65°C to +135°C
Conditions
-55°C - Tc - +125°C, V
IN
= 28 V
DC
TestSymbol
±5%, C
L
=0, unless otherwise specified
Subgroups
Group A
Min
1
2,3
1,2,3
1,2,3
1,2,3
AHV2805S
Max
Min
4.95
4.90
0.0
15
5
25
50
18
50
50
72
100
500
8.5
8.5
450
550
5.05
5.10
3.00
60
AHV2812S
Max
Min
11.88
11.76
0.0
15
30
60
120
18
50
50
72
100
200
8.5
8.5
450
550
12.12
12.24
1.25
60
AHV2815S
Max
Units
14.85
14.70
0.0
15
35
75
150
18
50
50
72
100
200
8.5
8.5
450
550
15.15
V
15.30
V
1.00
A
60
mV p-p
W
mV
mV
mV
mA
mA
mA p-p
%
MΩ
µF
W
W
KHz
STATIC CHARACTERISTICS
OUTPUT
V
OUT
Voltage
Current
I
OUT
Ripple Voltage
1
V
RIP
Power
REGULATION
Line
Load
INPUT
Current
Ripple Current
EFFICIENCY
ISOLATION
CAPACITIVE LOAD
2, 3
LOAD FAULT
POWER DISSIPATION
P
OUT
VR
LINE
V
IN
= 16, 28, and 40 V
DC
I
OUT
= 0
V
IN
= 16, 28, and 40 V
DC
V
IN
= 16, 28, and 40 V
DC
BW =
DC
to 1 MHz
V
IN
= 16, 28, and 40 V
DC
V
IN
= 16, 28, and 40 V
DC
1
I
OUT
= 0, Half Load and Full Load 2,3
VR
LOAD
V
IN
= 16, 28, and 40 V
DC
1,2,3
I
OUT
= 0, Half Load and Full Load
I
IN
I
RIP
E
FF
ISO
C
L
P
D
I
OUT
= 0, Inhibit (pin 2) = 0
I
OUT
= 0, Inhibit (pin 2) = Open
I
OUT
= Full Load
I
OUT
= Full Load
T
C
= +25°C
Input to output or any pin to
case (except pin 8) at 500 V
DC
,
Tc = +25°C
No effect on
DC
performance
Tc = +25°C
Overload, Tc = +25°C
4
Short circuit, Tc = +25°C
1,2,3
1,2,3
1
1
4
1
4
SWITCHING
FREQUENCY
F
S
I
OUT
= Full Load
DYNAMIC CHARACTERISTICS
STEP LOAD CHANGES
Output Transient
5
VO
TLOAD
50% Load
135
100% Load
No Load
135
50%
Recovery
5,6
TT
LOAD
50% Load
135
100% Load
No Load
335
50% Load
50% Load
335
No Load
STEP LINE CHANGES
Output Transient
VO
TLINE
Input step 16 to 40 V
DC
3,7
Input step 40 to 16 V
DC
3,7
Recovery
TT
LINE
Input step 16 to 40 V
DC
3,6,7
Input step 40 to 16 V
DC
3,6,7
TURN-ON
Overshoot
VT
ON OS
I
OUT
= OA and Full Load
Delay
T
ON D
I
OUT
= O and Full Load
8
LOAD FAULT RECOVERY tr
LF
V
IN
= 16 TO 40 V
DC
4
4
4
4
4
4
4
4
4
4,5,6
4,5,6
4,5,6
-300
-500
+300
+500
70
200
5
300
-1000
800
800
550
10
10
-300
-750
+300
+750
70
1500
5
500
-1500
800
800
750
10
10
-300
-750
+300
+750
70
1500
5
500
-1500
800
800
750
10
10
mVpk
mVpk
µS
µS
ms
mVpk
mVpk
µS
µS
mVpk
ms
ms
Notes:
1. Bandwidth guaranteed by design. Tested for 20 KHz to 2 MHz.
2. Capacitive load may be any value from 0 to the maximum limit without affecting dc performance. A capacitive load in excess of the maximum limit will not disturb loop stability
but will interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn-on.
3. Parameter shall be tested as part of design characterization and after design or process changes. Thereafter shall be guaranteed to the limits specified.
4. An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit protection and is the condition of maximum power
dissipation.
5. Load step transition time between 2 and 10 microseconds.
6. Recovery time is measured from the initiation of the transient to where V
OUT
has returned to within ±1 percent of V
OUT
at 50 percent load.
7. Input step transition time between 2 and 10 microseconds.
8. Turn on delay time measurement is for either a step application of power at input or the removal of a ground signal from the inhibit pin (pin 2) while power is applied to the
input.
9. Above 125°C case temperature, derate output power linearly to 0 at 135°C case.
2
SPECIFICATIONS (DUAL OUTPUT MODELS)
T
CASE
= -55°C to +125 °C, V
IN
= +28 V ±5% unless otherwise specified
ABSOLUTE MAXIMUM RATINGS
Input Voltage
Power Output
Soldering
Temperature Range
-0.5 V to 50 VDC (Continuous) 80 V (100ms)
Internally limited, 17.5W typical
300°C for 10 seconds (1 pin at a time)
Operating
-55°C to 135°C case
13
Storage -65°C to +135°C
Conditions
-55°C - Tc - +125°C, V
IN
= 28 V
DC
Test
Symbol
±5%, C
L
=0, unless otherwise specified
Group A
Subgroups
AHV2812D
Min
Max
AHV2815D
Min
Max
Units
STATIC CHARACTERISTICS
OUTPUT
Voltage
1
V
OUT
Current
1,2
Ripple Voltage
1,3
Power
1,2,4
REGULATION
Line
1,5
Load
1
INPUT
Current
Ripple Current
3
EFFICIENCY
ISOLATION
CAPACITIVE LOAD
6,7
LOAD FAULT POWER
DISSIPATION
I
OUT
V
RIP
P
OUT
I
OUT
= 0
V
IN
= 16, 28, and 40 V
DC
V
IN
= 16, 28, and 40 V
DC
BW =
DC TO
2 MH
Z
V
IN
= 16, 28, and 40 V
DC
1
2,3
1,2,3
1,2,3
1,2,3
1
2,3
1,2,3
1,2,3
1,2,3
1
1
4
1
4
±11.88 ±12.12
±11.76 ±12.24
0.0 ±625
60
15
30
60
120
18
65
50
72
100
200
8.5
8.5
550
±14.85 ±15.15
V
±14.70 ±15.30
V
0.0 ±500
mA
60
mV p-p
15
35
75
150
18
65
50
72
100
200
8.5
8.5
550
W
mV
mV
mV
mA
mA
mA p-p
%
MΩ
µf
W
W
KHz
VR
LINE
V
IN
= 16, 28, and 40 V
DC
I
OUT
I
OUT
= 0, Half Load and Full Load
VR
LOAD
V
IN
= 16, 28, and 40 V
DC
I
OUT
= 0, Half Load and Full Load
I
IN
I
RIP
E
FF
ISO
C
L
P
D
I
OUT
= 0, inhibit (pin 2)
Tied to input return (pin 10)
I
OUT
= 0, inhibit (pin 2) = open
I
OUT
= Full Load
BW =
DC
to 2MHz
I
OUT
= FULL LOAD, T
C
= +25°C
Input to output or any pin
to case (except pin 8) at 500
V
DC
, T
C
= +25°C
No effect on
DC
performance,
T
C
= +25°C
Over Load, T
C
= +25°C
8
Short Circuit, T
C
= +25°C
I
OUT
= FULL LOAD
SWITCHING FREQUENCY
F
S
DYNAMIC CHARACTERISTICS
STEP LOAD CHANGES
Output Transient
9
VO
TLOAD
50% Load
135
100% Load
No Load
135
50% Load
Recovery
9,10
TT
LOAD
50% Load
135
100% Load
No Load
335
50% Load
50% Load
335
No Load
STEP LINE CHANGES
Output Transient
7,11
VO
TLINE
Input step 16 to 40 V
DC
Input step 40 to 16 V
DC
7,10,11
Recovery
TT
LINE
Input step 16 to 40 V
DC
Input step 40 to 16 V
DC
TURN-ON
Overshoot
1
VT
ON OS
I
OUT
= O and Full Load
Delay
1,12
T
ON D
I
OUT
= O and Full Load
7
LOAD FAULT RECOVERY
tr
LF
450
450
4
4
4
4
4
4
4
4
4
4,5,6
4,5,6
4,5,6
-300
-500
+300
+500
70
1500
5
1200
-1500
4
4
600
10
10
-300
-500
+300
+500
70
1500
5
1500
-1500
4
4
600
10
10
mVpk
mVpk
µs
µs
ms
mVpk
mVpk
ms
ms
mVpk
ms
ms
Notes:
1. Tested at each output
2. Parameter guaranteed by line and load regulation tests.
3. Bandwidth guaranteed by design. Tested for 20 KHz to 2 MHz.
4. Total power at both outputs.
5. When operating with unbalanced loads, at least 25% of the load must be on the positive output to maintain regulation.
6. Capacitive load may be any value from 0 to the maximum limit without affecting dc performance. A capacitive load in excess of the maximum limit will not disturb loop stability
but may interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn-on.
7. Parameter shall be tested as part of design characterization and after design or process changes. Thereafter parameters shall be guaranteed to the limits specified.
8. An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit protection and is the condition of maximum power
dissipation.
9. Load step transition time between 2 and 10 microseconds.
10. Recovery time is measured from the initiation of the transient to where V
OUT
has returned to within ± 1 percent of V
OUT
at 50 percent load.
11. Input step transition time between 2 and 10 microseconds.
12. Turn on delay time measurement is for either a step application of power at input or the removal of a ground signal from the inhibit pin (pin 2) while power is applied to the
input.
13. Above 125°C case temperature, derate output power linearly to 0 at 135°C case.
3
SPECIFICATIONS (TRIPLE OUTPUT MODELS)
T
CASE
= -55°C to +125°C, V
IN
= +28 V ±5% unless otherwise specified
ABSOLUTE MAXIMUM RATINGS
Input Voltage
Power Output
Soldering
Temperature Range
-0.5 V to 50 VDC (Continuous) 80 V (100ms)
Internally limited, 17.5W typical
300°C for 10 seconds (1 pin at a time)
Operating
-55°C to 135°C case
8
Storage -65°C to +135°C
Conditions
-55°C - Tc - +125°C, V
IN
= 28 V
DC
Test
Symbol
±5%, C
L
=0, unless otherwise specified
Group A
Subgroups
AHV2812T
Min
Max
AHV2815T
Min
Max
Unit
STATIC CHARACTERISTICS
OUTPUT
Voltage
1
V
OUT
I
OUT
= 0 (main)
I
OUT
= 0 (dual)
1
Current
1,2,3
Ripple Voltage
1,4
I
OUT
V
RIP
Power
1,2,3
P
OUT
V
IN
= 16, 28, and 40 V
DC
(main)
V
IN
= 16, 28, and 40 V
DC
(dual)
1
V
IN
= 16, 28, and 40 V
DC
BW =
DC TO
2 MH
Z
(main)
V
IN
= 16, 28, and 40 V
DC
BW =
DC TO
2 MH
Z
(main)
V
IN
= 16, 28, and 40 V
DC
(main)
(+dual)
(-dual)
(total)
1
2,3
1
2,3
1,2,3
1,2,3
1,2,3
1,2,3
1,2,3
1,2,3
1,2,3
1,2,3
1,2,3
1
2,3
1,2,3
1,2,3
1,2,3
1,2,3
1,2,3
4.95
5.05
4.90
5.10
±11.88 ±12.12
±11.76 ±12.24
0.0 2000
0.0 ±208
80
40
10
2.5
2.5
15
25
±30
±60
50
±60
4.95
5.05
V
4.90
5.10
V
±14.85 ±15.15
V
±14.70 ±15.30
V
0.0 2000
mA
0.0 ±167
mA
80
mV p-p
40
10
2.5
2.5
15
25
±35
±75
50
±75
mV p-p
W
W
W
W
mV
mV
mV
mV
mV
REGULATION
Line
1,3
Load
1,3
V
IN
= 16, 28, and 40 V
DC
I
OUT
= 0, 1000, 2000 mA (main)
V
IN
= 16, 28, and 40 V
DC
I
OUT
= 0, ±104, ±208 mA (±12V) (dual)
I
OUT
= 0, ±84, ±167 mA (±15v)
VR
LOAD
V
IN
= 16, 28, and 40 V
DC
I
OUT
= 0, 1000, 2000 mA (main)
V
IN
= 16, 28, and 40 V
DC
I
OUT
= 0, ±104, ±208 mA (±12V) (dual)
I
OUT
= 0, ±84, ±167 mA (±15v)
I
IN
I
OUT
= 0 inhibit (pin 8)
tied to input return (pin 10)
I
OUT
= 0
inhibit (pin 2) = open
I
OUT
= 2000 mA (main)
I
OUT
= ±208 mA (±12V)
I
OUT
= ±167 mA (±15V)
BW =
DC
to 2MHz
I
OUT
= 2000 mA (main)
I
OUT
= ±208 mA (± 12V)
I
OUT
= ±167 mA (±15V)
Input to output or any pin to case (except
pin 7) at 500 Vdc, Tc = +25C
Over Load, T
C
= +25C
5
Short Circuit, T
C
= +25C
I
OUT
= 2000 mA (main)
I
OUT
= ±208 mA (±12V)
I
OUT
= ±167 mA (±15V)
No effect on
DC
performance,
T
C
= +25C
(main)
(dual)
VR
LINE
INPUT
Current
15
50
50
15
50
50
mA
mA
mA p-p
Ripple Current
4
I
RIP
EFFICIENCY
ISOLATION
LOAD FAULT POWER
DISSIPATION
3
SWITCHING FREQUENCY
1
CAPACITIVE LOAD
6,7
E
FF
ISO
P
D
F
S
C
L
1
1
1
1
4
72
100
8.5
8.5
550
72
100
8.5
8.5
550
%
MΩ
W
W
KHz
450
450
4
500
200
500
200
µf
µf
DYNAMIC CHARACTERISTICS
STEP LOAD CHANGES
Output Transient
9
VO
TLOAD
50% Load
135
100% Load
No Load
135
50% Load
Recovery
9,10
TT
LOAD
50% Load
135
100% Load
No Load
335
50% Load
50% Load
335
No Load
4
4
4
4
4
-300
-400
+300
+400
100
2000
5
-300
-400
+300
+400
100
2000
5
mVpk
mVpk
µs
µs
ms
4
STEP LINE CHANGES
Output Transient
7,11
Recovery
7,10,11
VO
TLINE
Input step 16 to 40 V
DC
Input step 40 to 16 V
DC
TT
LINE
Input step 16 to 40 V
DC
Input step 40 to 16 V
DC
4
4
4
4
4
4
4
1200
-1500
4
4
750
15
15
1200
-1500
4
4
750
15
15
mVpk
mVpk
ms
ms
mVpk
ms
ms
TURN-ON
Overshoot
1
VT
ON OS
I
OUT
= 0 and ±625 mA
Delay
1,12
T
ON D
I
OUT
= 0 and ±625 mA
7
LOAD FAULT RECOVERY
tr
LF
Notes:
1. Tested at each output
2. Parameter guaranteed by line and load regulation tests.
3. At least 25 percent of the total power should be taken from the (+5 volt) main output.
4. Bandwidth guaranteed by design. Tested for 20 KHz to 2 MHz.
5. An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit protection and is the condition of maximum power
dissipation.
6. Capacitive load may be any value from 0 to the maximum limit without affecting dc performance. A capacitive load in excess of the maximum limit will not disturb loop
stability but may interfere with the operation of the load fault detection circuitry, appearing as a short circuit during turn-on.
7. Parameter shall be tested as part of design characterization and after design or process changes. Thereafter parameters shall be guaranteed to the limits specified.
8. Above 125°C case temperature, derate output power linearly to 0 at 135°C case.
9. Load step transition time between 2 and 10 microseconds.
10. Recovery time is measured from the initiation of the transient to where V
OUT
has returned to within ± 1 percent of V
OUT
at 50 percent load.
11. Input step transition time between 2 and 10 microseconds.
12. Turn on delay time measurement is for either a step application of power at input or the removal of a ground signal from the inhibit pin (pin 8) while power is applied to
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