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MXD1000PA35

Description
Delay Line, 1-Func, 5-Tap, CMOS
Categorylogic    logic   
File Size71KB,8 Pages
ManufacturerMaxim
Websitehttps://www.maximintegrated.com/en.html
Download Datasheet Parametric View All

MXD1000PA35 Overview

Delay Line, 1-Func, 5-Tap, CMOS

MXD1000PA35 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerMaxim
Reach Compliance Codenot_compliant
JESD-30 codeR-XDIP-T8
JESD-609 codee0
Number of functions1
Number of taps/steps5
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
encapsulated codeDIP
Encapsulate equivalent codeDIP8,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Maximum supply current (ICC)75 mA
programmable delay lineNO
Prop。Delay @ Nom-Sup35 ns
Certification statusNot Qualified
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED

MXD1000PA35 Preview

19-1310; Rev 0; 10/97
5-Tap Silicon Delay Line
_______________General Description
The MXD1000 silicon delay line offers five equally
spaced taps with delays ranging from 4ns to 500ns and
a nominal accuracy of ±2ns or ±5%, whichever is
greater. Relative to hybrid solutions, this device offers
enhanced performance and higher reliability, and
reduces overall cost. Each tap can drive up to ten 74LS
loads.
The MXD1000 is available in multiple versions, each
offering a different combination of delay times. It comes
in the space-saving 8-pin µMAX package, as well as an
8-pin SO or DIP, allowing full compatibility with the
DS1000 and other delay line products.
____________________________Features
o
Improved Second Source to DS1000
o
Available in Space-Saving 8-Pin µMAX Package
o
20mA Supply Current (vs. Dallas’ 35mA)
o
Low Cost
o
Delay Tolerance of ±2ns or ±5%, whichever is
Greater
o
TTL/CMOS-Compatible Logic
o
Leading- and Trailing-Edge Accuracy
o
Custom Delays Available
MXD1000
________________________Applications
Clock Synchronization
Digital Systems
______________Ordering Information
PART
MXD1000C/D__
MXD1000PA__
MXD1000PD__
MXD1000SA__
MXD1000SE__
MXD1000UA__
TEMP. RANGE
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
Dice*
8 Plastic DIP
14 Plastic DIP
8 SO
16 Narrow SO
8 µMAX
Functional Diagram appears at end of data sheet.
*Dice
are tested at T
A
= +25°C.
Note:
To complete the ordering information, fill in the blank
with the part number extension from the Part Number and Delay
Times table (located at the end of this data sheet) to indicate
the desired delay per output.
__________________________________________________________Pin Configurations
TOP VIEW
IN
1
TAP2
2
8
7
V
CC
TAP1
TAP3
TAP5
IN 1
N.C.
N.C.
2
3
14 V
CC
13 N.C.
12 TAP1
IN 1
N.C. 2
N.C. 3
TAP2 4
N.C. 5
TAP4 6
N.C. 7
GND 8
16 V
CC
15 N.C.
14 N.C.
MXD1000
TAP4
3
6
5
GND
4
TAP2 4
N.C. 5
TAP4 6
MXD1000
11 N.C.
10 TAP3
9
8
N.C.
TAP5
MXD1000
13 TAP1
12 N.C.
11 TAP3
10 N.C.
9
TAP5
DIP/SO/µMAX
GND 7
DIP
SO
________________________________________________________________
Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 408-737-7600 ext. 3468.
5-Tap Silicon Delay Line
MXD1000
ABSOLUTE MAXIMUM RATINGS
V
CC
to GND ..............................................................-0.5V to +6V
All Other Pins..............................................-0.5V to (V
CC
+ 0.5V)
Short-Circuit Output Current (1sec) ....................................50mA
Continuous Power Dissipation (T
A
= +70°C)
8-Pin Plastic DIP (derate 9.1mW/°C above +70°C) .......727mW
14-Pin Plastic DIP (derate 10.0mW/°C above +70°C) ...800mW
8-Pin SO (derate 5.9mW/°C above +70°C)....................471mW
16-Pin Narrow SO (derate 8.7mW/°C above +70°C) .....696mW
8-Pin µMAX (derate 4.1mW/°C above +70°C) ...............330mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +160°C
Lead Temperature (soldering, 10sec) .............................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
CC
= +5.0V ±5%, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 2)
PARAMETER
Supply Voltage
Input Voltage High
Input Voltage Low
Input Leakage Current
Active Current
Output Current High
Output Current Low
Input Capacitance
SYMBOL
V
CC
V
IH
V
IL
I
L
I
CC
I
OH
I
OL
C
IN
(Note 3)
(Note 3)
(Note 3)
0V
V
IN
V
CC
V
CC
= 5.25V, period = minimum (Notes 4, 5)
V
CC
= 4.75V, V
OH
= 4.0V
V
CC
= 4.75V, V
OL
= 0.5V
T
A
= +25°C (Note 6)
12
5
10
-1
20
CONDITIONS
MIN
4.75
2.2
0.8
1
75
-1
TYP
5.00
MAX
5.25
UNITS
V
V
V
µA
mA
mA
mA
pF
TIMING CHARACTERISTICS
(V
CC
= +5.0V ±5%, T
A
= +25°C, unless otherwise noted.)
PARAMETER
Input Pulse Width
Input-to-Tap Delay
(leading edge)
Input-to-Tap Delay
(trailing edge)
Power-Up Time
Period
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
SYMBOL
t
WI
t
PLH
t
PHL
t
PU
(Note 7)
4(t
WI
)
CONDITIONS
(Note 7)
(Notes 1, 8–12)
(Notes 1, 8–12)
MIN
40% of TAP5
t
PLH
See
Part Number and
Delay Times
table
See
Part Number and
Delay Times
table
100
TYP
MAX
UNITS
ns
ns
ns
ms
ns
Contact factory for ordering information.
Specifications to -40°C are guaranteed by design, not production tested.
All voltages referenced to GND.
Measured with output open.
I
CC
is a function of frequency and TAP5 delay. Only an MXD1000_ _25 operating with a 40ns period and V
CC
= +5.25V will have
an I
CC
= 75mA. For example, an MXD1000_ _100 will never exceed 30mA. See Supply Current vs. Input Frequency in
Typical
Operating Characteristics.
Note 6:
Guaranteed by design.
Note 7:
Pulse width and/or period specifications may be exceeded, but accuracy is application sensitive (i.e., layout, decoupling,
etc.). The device will remain functional with pulse widths down to 20% of TAP5 delay, and input periods as short as 2(t
WI
).
Note 8:
Typical initial tolerances are ± with respect to the nominal value at +25°C and V
CC
= 5V.
Note 9:
Typical temperature tolerance is ± with respect to the initial delay value over a temperature range of -40°C to +85°C.
Note 10:
The delay will also vary with supply voltage, typically by less than 4% over the supply range of V
CC
= +4.75V to +5.25V.
Note 11:
All tap delays tend to vary unidirectionally with temperature or voltage changes. For example, if TAP1 slows down, all other
taps will also slow down; i.e., TAP3 can never be faster than TAP2.
2
_______________________________________________________________________________________
5-Tap Silicon Delay Line
__________________________________________Typical Operating Characteristics
(V
CC
= +5V, T
A
= +25°C, unless otherwise noted.)
MXD1000
ACTIVE CURRENT
vs. FREQUENCY
MXD1000-04
MXD1000_ _75
PERCENT CHANGE IN DELAY
vs. TEMPERATURE
1.5
% CHANGE IN DELAY (TAP2)
1.0
0.5
0
-0.5
-1.0
-1.5
-2.0
10
100
RELATIVE TO NOMINAL (+25°C)
-40
-20
0
20
40
60
80
100
t
PHL
t
PLH
t
PLH
t
PHL
MXD1000 TOC01
20
50% DUTY CYCLE
18
ACTIVE CURRENT (mA)
16
MXD1000_ _50
14
12
10
8
0.001
0.01
0.1
1
FREQUENCY (MHz)
MXD1000_ _75
2.0
MXD1000_ _200
MXD1000_ _500
TEMPERATURE (°C)
MXD1000_ _100 TO MXD1000_ _200
PERCENT CHANGE IN DELAY
vs. TEMPERATURE
MXD1000 TOC2
MXD1000_ _250 TO MXD1000_ _500
PERCENT CHANGE IN DELAY
vs. TEMPERATURE
1.5
% CHANGE IN DELAY (TAP2)
1.0
0.5
0
-0.5
t
PLH
-1.0
-1.5
-2.0
RELATIVE TO NOMINAL (+25°C)
-40
-20
0
20
40
60
80
100
t
PHL
t
PHL
t
PLH
MXD1000 TOC03
2.0
1.5
% CHANGE IN DELAY (TAP2)
1.0
0.5
0
-0.5
-1.0
-1.5
-2.0
-40
-20
0
20
40
60
80
RELATIVE TO NOMINAL (+25°C)
t
PHL
t
PLH
t
PLH
t
PHL
2.0
100
TEMPERATURE (°C)
TEMPERATURE (°C)
_______________________________________________________________________________________
3
5-Tap Silicon Delay Line
MXD1000
______________________________________________________________Pin Description
PIN
8-PIN
DIP/SO/µMAX
1
2
3
4
5
6
7
8
14-PIN DIP
1
4
6
7
8
10
12
14
2, 3, 5, 9, 11,
13
16-PIN SO
1
4
6
8
9
11
13
16
2, 3, 5, 7, 10,
12, 14, 15
NAME
IN
TAP2
TAP4
GND
TAP5
TAP3
TAP1
V
CC
N.C.
Signal Input
40% of specified maximum delay
80% of specified maximum delay
Device Ground
100% of maximum specified delay
60% of specified maximum delay
20% of specified maximum delay
Power-Supply Input
No Connection. Not internally connected.
FUNCTION
Note:
Maximum delay is determined by the part number extension. See the Part Number and Delay Times table for more information.
_______________Definitions of Terms
Period:
The time elapsed between the first pulse’s
leading edge and the following pulse’s leading edge.
Pulse Width (t
WI
):
The time elapsed on the pulse
between the 1.5V level on the leading edge and the
1.5V level on the trailing edge, or vice-versa.
Input Rise Time (t
RISE
):
The time elapsed between
the 20% and 80% points on the input pulse’s leading
edge.
Input Fall Time (t
FALL
):
The time elapsed between
the 80% and 20% points on the input pulse’s trailing
edge.
Time Delay, Rising (t
PLH
):
The time elapsed between
the 1.5V level on the input pulse’s leading edge and the
corresponding output pulse’s leading edge.
Time Delay, Falling (t
PHL
):
The time elapsed between
the 1.5V level on the input pulse’s trailing edge and the
corresponding output pulse’s trailing edge.
____________________Test Conditions
Ambient Temperature:
Supply Voltage (V
CC
):
Input Pulse:
+25°C ±3°C
+5V ±0.1V
High = 3.0V ±0.1V
Low = 0.0V ±0.1V
Source Impedance:
50Ω max
Rise and Fall Times:
3.0ns max
Pulse Width:
500ns max (1ns for -500)
Period:
1µs (2ns for -500)
Each output is loaded with a 74F04 input gate. Delay is
measured at the 1.5V level on the rising and falling
edges. The time delay due to the 74F04 is subtracted
from the measured delay.
4
_______________________________________________________________________________________
5-Tap Silicon Delay Line
MXD1000
V
CC
(+5V)
PERIOD
0.1µF
TIME
MEASUREMENT
UNIT
t
RISE
V
IH
IN
V
IL
2.4V
1.5V
0.6V
t
FALL
2.4V
1.5V
0.6V
1.5V
IN
50Ω
20%
TAP1
t
WI
20%
TAP2
t
PHL
MXD1000
20%
TAP3
t
PLH
20%
TAP4
1.5V
OUT
1.5V
20%
TAP5
74FO4
Figure 1. Timing Diagram
Figure 2. Test Circuit
__________Applications Information
Supply and Temperature
Effects on Delay
Variations in supply voltage may affect the MXD1000’s
fixed tap delays. Supply voltages beyond the specified
range may result with larger variations. The devices are
internally compensated to reduce the effects of temper-
ature variations. Although these devices might vary with
supply and temperature, the delays vary unilaterally,
which suggests that TAP3 can never be faster than
TAP2.
Capacitance and Loading
Effects on Delay
The output load can affect the tap delays. Larger
capacitances tend to lengthen the rising and falling
edges, thus increasing the tap delays. As the taps are
loaded with other logic devices, the increased load will
increase the tap delays.
Board Layout Considerations/Decoupling
The device should be driven with a source that can
deliver the required current for proper operation. A
0.1µF ceramic bypassing capacitor could be used. The
board should be designed to reduce stray capaci-
tance.
_______________________________________________________________________________________
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