TC74ACT161,163P/F
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74ACT161P,TC74ACT161F
TC74ACT163P,TC74ACT163F
Synchronous Presettable 4-Bit Binary Counter
TC74ACT161P/F/FN Asynchronous Clear
TC74ACT163P/F/FN Synchronous Clear
The TC74ACT161 and T163 are advanced high speed CMOS
SYNCHRONOUS PRESETTABLE 4 BIT BINARY COUNTERs
fabricated with silicon gate and double-layer metal wiring
C
2
MOS technology.
They achieve the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
These devices may be used as a level converter for interfacing
TTL or NMOS to High Speed CMOS. The inputs are compatible
with TTL, NMOS and CMOS output voltage levels.
The CK input is active on the rising edge. Both
LOAD
and
CLR
inputs are active on low logic level.
Presetting of these IC’s is synchronous to the rising edge of CK.
The clear function of the TC74ACT163 is synchronous to CK,
while the TC74ACT161 are cleared asynchronously.
Two enable inputs (ENP and ENT) and CARRY OUTPUT are
provided to enable easy cascading of counters, which facilitates
easy implementation of n-bit counters without using external
gates.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
TC74ACT161P, TC74ACT163P
TC74ACT161F, TC74ACT163F
Weight
DIP16-P-300-2.54A
SOP16-P-300-1.27A
: 1.00 g (typ.)
: 0.18 g (typ.)
Features
•
•
•
•
High speed: f
max
=
110 MHz (typ.) at V
CC
=
5 V
Low power dissipation: I
CC
=
8
μA
(max) at Ta
=
25°C
Compatible with TTL outputs: V
IL
=
0.8 V (max)
V
IH
=
2.0 V (min)
Symmetrical output impedance: |I
OH
|
=
I
OL
=
24 mA (min)
Capability of driving 50
Ω
•
•
transmission lines.
Balanced propagation delays: t
pLH
∼
t
pHL
−
Pin and function compatible with 74F161/163
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TC74ACT161,163P/F
Pin Assignment
IEC Logic Symbol
TC74ACT161
TC74ACT163
Truth Table
Inputs
CLR
(161)
CLR
(163)
LOAD
Outputs
ENT
X
X
L
X
H
X
CK
(161)
X
CK
(163)
QA
L
A
QB
L
B
QC
L
C
QD
L
D
Function
Reset to “0”
Preset Data
No Count
No Count
Count
No Count
ENP
X
X
X
L
H
X
L
H
H
H
H
H
L
H
H
H
H
X
X
L
H
H
H
X
No Change
No Change
Count Up
No Change
X: Don’t care
A, B, C, D: Logic level of data inputs
Carry: Carry
=
ENT½QA½QB½QC½QD
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TC74ACT161,163P/F
Timing Chart
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TC74ACT161,163P/F
System Diagram (Note)
(Note)
(Note)
(Note)
(Note)
Note:
Truth table of internal F/F
TC74ACT161
D
X
L
H
X
CK
X
R
H
L
L
L
Q
L
L
H
Q
TC74ACT163
D
X
L
X
X
CK
R
H
L
L
L
Q
L
L
H
Q
H
H
L
H
H
L
No Change
No Change
X: Don’t care
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2012-02-29
TC74ACT161,163P/F
Absolute Maximum Ratings (Note 1)
Characteristics
Supply voltage range
DC input voltage
DC output voltage
Input diode current
Output diode current
DC output current
DC V
CC
/ground current
Power dissipation
Storage temperature
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
P
D
T
stg
Rating
−0.5
to 7.0
−0.5
to V
CC
+
0.5
−0.5
to V
CC
+
0.5
±20
±50
±50
±125
500 (DIP) (Note 2)/180 (SOP)
−65
to 150
Unit
V
V
V
mA
mA
mA
mA
mW
°C
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 2: 500 mW in the range of Ta
=
−40
to 65°C. From Ta
=
65 to 85°C a derating factor of
−10
mW/°C should be
applied up to300 mW.
Operating Ranges (Note)
Characteristics
Supply voltage
Input voltage
Output voltage
Operating temperature
Input rise and fall time
Symbol
V
CC
V
IN
V
OUT
T
opr
dt/dV
Rating
4.5 to 5.5
0 to V
CC
0 to V
CC
−40
to 85
0 to 10
Unit
V
V
V
°C
ns/V
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
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2012-02-29
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