PBSS5330PA
30 V, 3 A PNP low V
CEsat
(BISS) transistor
Rev. 01 — 19 April 2010
Product data sheet
1. Product profile
1.1 General description
PNP low V
CEsat
Breakthrough In Small Signal (BISS) transistor, encapsulated in an ultra
thin SOT1061 leadless small Surface-Mounted Device (SMD) plastic package with
medium power capability.
NPN complement: PBSS4330PA.
1.2 Features and benefits
Low collector-emitter saturation voltage V
CEsat
High collector current capability I
C
and I
CM
Smaller required Printed-Circuit Board (PCB) area than for conventional transistors
Exposed heat sink for excellent thermal and electrical conductivity
Leadless small SMD plastic package with medium power capability
1.3 Applications
Loadswitch
Battery-driven devices
Power management
Charging circuits
Power switches (e.g. motors, fans)
1.4 Quick reference data
Table 1.
Symbol
V
CEO
I
C
I
CM
R
CEsat
[1]
Quick reference data
Parameter
collector-emitter voltage
collector current
peak collector current
collector-emitter
saturation resistance
single pulse;
t
p
≤
1 ms
I
C
=
−3
A;
I
B
=
−300
mA
[1]
Conditions
open base
Min
-
-
-
-
Typ
-
-
-
75
Max
−30
−3
−5
107
Unit
V
A
A
mΩ
Pulse test: t
p
≤
300
μs; δ ≤
0.02.
NXP Semiconductors
PBSS5330PA
30 V, 3 A PNP low V
CEsat
(BISS) transistor
2. Pinning information
Table 2.
Pin
1
2
3
Pinning
Description
base
emitter
collector
3
1
2
1
2
sym013
Simplified outline
Graphic symbol
3
Transparent top view
3. Ordering information
Table 3.
Ordering information
Package
Name
PBSS5330PA
Description
Version
HUSON3 plastic thermal enhanced ultra thin small outline package; SOT1061
no leads; three terminals; body 2
×
2
×
0.65 mm
Type number
4. Marking
Table 4.
Marking codes
Marking code
AJ
Type number
PBSS5330PA
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CBO
V
CEO
V
EBO
I
C
I
CM
I
B
P
tot
Parameter
collector-base voltage
collector-emitter voltage
emitter-base voltage
collector current
peak collector current
base current
total power dissipation
T
amb
≤
25
°C
[1]
[2]
[3]
[4]
Conditions
open emitter
open base
open collector
single pulse;
t
p
≤
1 ms
Min
-
-
-
-
-
-
-
-
-
-
Max
−30
−30
−6
−3
−5
−500
500
1
1.25
2.1
Unit
V
V
V
A
A
mA
mW
W
W
W
PBSS5330PA_1
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 19 April 2010
2 of 15
NXP Semiconductors
PBSS5330PA
30 V, 3 A PNP low V
CEsat
(BISS) transistor
Table 5.
Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
T
j
T
amb
T
stg
[1]
[2]
[3]
[4]
Parameter
junction temperature
ambient temperature
storage temperature
Conditions
Min
-
−55
−65
Max
150
+150
+150
Unit
°C
°C
°C
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm
2
.
Device mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
2.5
P
tot
(W)
2.0
(1)
006aab999
1.5
(2)
(3)
1.0
(4)
0.5
0.0
−75
−25
25
75
125
175
T
amb
(°C)
(1) Ceramic PCB, Al
2
O
3
, standard footprint
(2) FR4 PCB, mounting pad for collector 6 cm
2
(3) FR4 PCB, mounting pad for collector 1 cm
2
(4) FR4 PCB, standard footprint
Fig 1.
Power derating curves
6. Thermal characteristics
Table 6.
Symbol
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from
junction to ambient
Conditions
in free air
[1]
[2]
[3]
[4]
Min
-
-
-
-
Typ
-
-
-
-
Max
250
125
100
60
Unit
K/W
K/W
K/W
K/W
[1]
[2]
[3]
[4]
PBSS5330PA_1
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm
2
.
Device mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 19 April 2010
3 of 15
NXP Semiconductors
PBSS5330PA
30 V, 3 A PNP low V
CEsat
(BISS) transistor
10
3
Z
th(j-a)
(K/W)
10
2
duty cycle = 1
0.75
0.33
0.2
0.1
10
0.02
0.01
1
0.05
0.5
006aab979
0
10
−1
10
−5
10
−4
10
−3
10
−2
10
−1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, standard footprint
Fig 2.
10
3
Z
th(j-a)
(K/W)
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
006aab980
duty cycle = 1
10
2
0.75
0.33
0.2
10
0.1
0.05
0.02
1
0
0.01
0.5
10
−1
10
−5
10
−4
10
−3
10
−2
10
−1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, mounting pad for collector 1 cm
2
Fig 3.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PBSS5330PA_1
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 19 April 2010
4 of 15
NXP Semiconductors
PBSS5330PA
30 V, 3 A PNP low V
CEsat
(BISS) transistor
10
3
Z
th(j-a)
(K/W)
10
2
duty cycle = 1
0.75
0.33
0.2
10
0.1
0.05
0.5
006aac000
1
0
0.02
0.01
10
−1
10
−5
10
−4
10
−3
10
−2
10
−1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, mounting pad for collector 6 cm
2
Fig 4.
10
2
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
006aab982
duty cycle = 1
Z
th(j-a)
(K/W)
10
0.1
0.05
0.02
1
0
0.01
0.75
0.5
0.33
0.2
10
−1
10
−5
10
−4
10
−3
10
−2
10
−1
1
10
10
2
t
p
(s)
10
3
Ceramic PCB, Al
2
O
3
, standard footprint
Fig 5.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PBSS5330PA_1
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 19 April 2010
5 of 15
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