PCA9535D/G,118 datasheet, PDF - EEWORLD Datasheet

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PCA9535D/G,118: Description16 I/O, PIA-GENERAL PURPOSE, PDSO24; CategoryThe embedded processor and controller Microcontrollers and processors; File Size183KB，31 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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PCA9535D/G,118 Overview

16 I/O, PIA-GENERAL PURPOSE, PDSO24

PCA9535D/G,118 Parametric

Parameter Name	Attribute value
Source Url Status Check Date	2013-10-15 00:00:00
Brand Name	NXP Semiconduc
Maker	NXP
Parts packaging code	SOP
package instruction	SOP,
Contacts	24
Manufacturer packaging code	SOT137-1
Reach Compliance Code	unknow
JESD-30 code	R-PDSO-G24
JESD-609 code	e4
length	15.4 mm
Number of I/O lines	16
Number of ports	2
Number of terminals	24
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Maximum seat height	2.65 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	2.3 V
Nominal supply voltage	3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	NICKEL PALLADIUM GOLD
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
width	7.5 mm
uPs/uCs/peripheral integrated circuit type	PARALLEL IO PORT, GENERAL PURPOSE

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PCA9535; PCA9535C

16-bit I

C-bus and SMBus, low power I/O port with interrupt

Rev. 05 — 15 September 2008

Product data sheet

1. General description

The PCA9535 and PCA9535C are 24-pin CMOS devices that provide 16 bits of General

Purpose parallel Input/Output (GPIO) expansion for I

C-bus/SMBus applications and was

developed to enhance the NXP Semiconductors family of I

C-bus I/O expanders. The

improvements include higher drive capability, 5 V I/O tolerance, lower supply current,

individual I/O conﬁguration, and smaller packaging. I/O expanders provide a simple

solution when additional I/O is needed for ACPI power switches, sensors, push buttons,

LEDs, fans, etc.

The PCA9535 and PCA9535C consist of two 8-bit Conﬁguration (Input or Output

selection), Input, Output and Polarity Inversion (active HIGH or active LOW operation)

registers. The system master can enable the I/Os as either inputs or outputs by writing to

the I/O conﬁguration bits. The data for each input or output is kept in the corresponding

Input or Output register. The polarity of the read register can be inverted with the Polarity

Inversion register. All registers can be read by the system master. Although pin-to-pin and

C-bus address compatible with the PCF8575, software changes are required due to the

enhancements and are discussed in

Application Note AN469.

The PCA9535 is identical to the PCA9555 except for the removal of the internal I/O pull-up

resistor which greatly reduces power consumption when the I/Os are held LOW.

The PCA9535C is identical to the PCA9535 except that all the I/O pins are

high-impedance open-drain outputs.

The PCA9535 and PCA9535C open-drain interrupt output is activated when any input

state differs from its corresponding Input Port register state and is used to indicate to the

system master that an input state has changed. The power-on reset sets the registers to

their default values and initializes the device state machine.

Three hardware pins (A0, A1, A2) vary the ﬁxed I

C-bus address and allow up to eight

devices to share the same I

C-bus/SMBus. The ﬁxed I

C-bus address of the PCA9535

and PCA9535C are the same as the PCA9555 allowing up to eight of these devices in any

combination to share the same I

C-bus/SMBus.

2. Features

Operating power supply voltage range of 2.3 V to 5.5 V

5 V tolerant I/Os

Polarity Inversion register

Active LOW interrupt output

Low standby current

Noise ﬁlter on SCL/SDA inputs

PCA9535D/G,118 Related Products

	PCA9535D/G,118	PCA9535CD,112	PCA9535PW/G,118	PE3C0041
Description	16 I/O, PIA-GENERAL PURPOSE, PDSO24	16 I/O, PIA-GENERAL PURPOSE, PDSO24	16 I/O, PIA-GENERAL PURPOSE, PDSO24	N Male to N Male Right Angle Cable Using LMR-400 Coax
Brand Name	NXP Semiconduc	NXP Semiconduc	NXP Semiconduc	-
Maker	NXP	NXP	NXP	-
Parts packaging code	SOP	SOP	TSSOP2	-
package instruction	SOP,	SOP, SOP24,.4	TSSOP,	-
Contacts	24	24	24	-
Manufacturer packaging code	SOT137-1	SOT137-1	SOT355-1	-
Reach Compliance Code	unknow	compli	unknow	-
JESD-30 code	R-PDSO-G24	R-PDSO-G24	R-PDSO-G24	-
JESD-609 code	e4	e4	e4	-
length	15.4 mm	15.4 mm	7.8 mm	-
Number of I/O lines	16	16	16	-
Number of ports	2	2	2	-
Number of terminals	24	24	24	-
Maximum operating temperature	85 °C	85 °C	85 °C	-
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	-
encapsulated code	SOP	SOP	TSSOP	-
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	-
Package form	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	-
Maximum seat height	2.65 mm	2.65 mm	1.1 mm	-
Maximum supply voltage	5.5 V	5.5 V	5.5 V	-
Minimum supply voltage	2.3 V	2.3 V	2.3 V	-
Nominal supply voltage	3 V	3 V	3 V	-
surface mount	YES	YES	YES	-
technology	CMOS	CMOS	CMOS	-
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	-
Terminal surface	NICKEL PALLADIUM GOLD	Nickel/Palladium/Gold (Ni/Pd/Au)	NICKEL PALLADIUM GOLD	-
Terminal form	GULL WING	GULL WING	GULL WING	-
Terminal pitch	1.27 mm	1.27 mm	0.65 mm	-
Terminal location	DUAL	DUAL	DUAL	-
width	7.5 mm	7.5 mm	4.4 mm	-
uPs/uCs/peripheral integrated circuit type	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE	-

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