BLF25M612G
Power LDMOS transistor
Rev. 1 — 5 June 2012
Objective data sheet
1. Product profile
1.1 General description
12 W LDMOS power transistor for Industrial, Scientific and Medical (ISM) applications at
frequencies from 2400 MHz to 2500 MHz.
The BLF25M612G is a driver designed for high power CW applications and is assembled
in a high performance ceramic package.
Table 1.
Typical performance
RF performance at T
case
= 25
°
C in a common source class-AB production test circuit.
Test signal
CW
f
(MHz)
2450
V
DS
(V)
28
P
L(AV)
(W)
12
G
p
(dB)
18
η
D
(%)
58
1.2 Features and benefits
High efficiency
High power gain
Excellent ruggedness
Excellent thermal stability
Integrated ESD protection
Designed for broadband operation (2400 MHz to 2500 MHz)
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
Industrial, scientific and medical applications in the frequency range 2400 MHz to
2500 MHz
NXP Semiconductors
BLF25M612G
Power LDMOS transistor
2. Pinning information
Table 2.
Pin
1
2
3
Pinning
Description
drain
gate
source
[1]
Simplified outline
Graphic symbol
1
1
2
3
sym112
2
[1]
Connected to flange.
3. Ordering information
Table 3.
Ordering information
Package
Name
BLF25M612G
-
Description
earless flanged ceramic package; 2 leads
Version
SOT975C
Type number
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
GS
T
stg
T
j
Parameter
drain-source voltage
gate-source voltage
storage temperature
junction temperature
Conditions
Min
-
−0.5
−65
-
Max
65
+13
-
225
Unit
V
V
°C
°C
5. Thermal characteristics
Table 5.
Symbol
Thermal characteristics
Parameter
Conditions
T
case
= 80
°C;
P
L
= 12 W
Typ
4.0
Unit
K/W
R
th(j-case)
thermal resistance from junction to case
BLF25M612G
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Objective data sheet
Rev. 1 — 5 June 2012
2 of 10
NXP Semiconductors
BLF25M612G
Power LDMOS transistor
6. Characteristics
Table 6.
Characteristics
T
j
= 25
°
C per section; unless otherwise specified.
Symbol Parameter
V
(BR)DSS
drain-source breakdown
voltage
V
GS(th)
I
DSS
I
DSX
I
GSS
g
fs
R
DS(on)
gate-source threshold voltage
drain leakage current
drain cut-off current
gate leakage current
forward transconductance
drain-source on-state
resistance
Conditions
V
GS
= 0 V; I
D
= 0.18 mA
V
DS
= 10 V; I
D
= 18 mA
V
GS
= 0 V; V
DS
= 28 V
V
GS
= V
GS(th)
+ 3.75 V;
V
DS
= 10 V
V
GS
= 11 V; V
DS
= 0 V
V
DS
= 10 V; I
D
= 0.9 A
V
GS
= V
GS(th)
+ 3.75 V;
I
D
= 0.6 A
Min
65
1.4
-
-
-
-
-
Typ
-
1.9
-
3.2
-
1.3
0.8
Max
-
2.4
1.4
-
140
-
1.3
Unit
V
V
μA
A
nA
S
Ω
Table 7.
Application information
Test signal: CW at f = 2450 MHz; RF performance at V
DS
= 28 V; I
Dq
= 10 mA; T
case
= 25
°
C; unless
otherwise specified; in a class-AB production test circuit.
Symbol
G
p
RL
in
η
D
Parameter
power gain
input return loss
drain efficiency
Conditions
P
L
= 12 W
P
L
= 12 W
P
L
= 12 W
Min
17
-
53
Typ
18
−14
58
Max
-
−10
-
Unit
dB
dB
%
7. Test information
7.1 Ruggedness in class-AB operation
The BLF25M612G is capable of withstanding a load mismatch corresponding to
VSWR = 10 : 1 through all phases under the following conditions: V
DS
= 28 V;
I
Dq
= 10 mA; P
L
= 12 W (CW); f = 2450 MHz.
7.2 Impedance information
Table 8.
Typical impedance
Measured load-pull data. Typical values unless otherwise specified.
f
(MHz)
2400
2450
2500
Z
S
(Ω)
3.0
−
11.4j
3.7
−
11.4j
3.8
−
11.4j
Z
L
(Ω)
4.17
−
3.3j
4.3
−
2.7j
4.7
−
4.6j
BLF25M612G
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Objective data sheet
Rev. 1 — 5 June 2012
3 of 10
NXP Semiconductors
BLF25M612G
Power LDMOS transistor
drain
Z
L
gate
Z
S
001aaf059
Fig 1.
Definition of transistor impedance
7.3 Test circuit
&
&
&
5
&
&
&
&
&
&
%/)0
%/)0
DDD
Printed-Circuit Board (PCB): Rogers 4350B;
ε
r
= 3.5; thickness = 0.508 mm;
thickness copper plating = 35
μm
See
Table 9
for a list of components.
Fig 2.
Component layout
Table 9.
List of components
For test circuit see
Figure 2.
Component
C1, C2, C3, C4
C5, C6
C7, C8
C9
R1
Description
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
electrolytic capacitor
SMD resistor
Value
15 pF
220 nF
4.7
μF;
50 V
100
μF;
63 V
7.5
Ω
SMD 0805
Remarks
ATC100A
SMD 1206
BLF25M612G
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Objective data sheet
Rev. 1 — 5 June 2012
4 of 10
NXP Semiconductors
BLF25M612G
Power LDMOS transistor
7.4 Graphical data
DDD
*
S
'
*
S
DDD
'
3
/
3
/
V
DS
= 28 V; I
Dq
= 10 mA.
(1) G
p
at f = 2400 MHz
(2) G
p
at f = 2450 MHz
(3) G
p
at f = 2500 MHz
(4)
η
D
at f = 2400 MHz
(5)
η
D
at f = 2450 MHz
(6)
η
D
at f = 2500 MHz
V
DS
= 28 V; I
Dq
= 10 mA.
(1) G
p
at f = 2400 MHz
(2) G
p
at f = 2450 MHz
(3) G
p
at f = 2500 MHz
(4)
η
D
at f = 2400 MHz
(5)
η
D
at f = 2450 MHz
(6)
η
D
at f = 2500 MHz
Fig 3.
Power gain and drain efficiency as function of
load power; typical values
Fig 4.
Power gain and drain efficiency as function of
load power; typical values
BLF25M612G
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Objective data sheet
Rev. 1 — 5 June 2012
5 of 10
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