BLF7G22L-100P;
BLF7G22LS-100P
Power LDMOS transistor
Rev. 3 — 2 January 2012
Product data sheet
1. Product profile
1.1 General description
100 W LDMOS power transistor for base station applications at frequencies from
2000 MHz to 2200 MHz.
Table 1.
Typical performance
Typical RF performance at T
case
= 25
C in a common source class-AB production test circuit.
Test signal
2-carrier W-CDMA
[1]
f
(MHz)
2110 to 2170
I
Dq
(mA)
720
V
DS
(V)
28
P
L(AV)
(W)
20
G
p
(dB)
19.1
D
(%)
ACPR
5M
(dBc)
28.5
34
[1]
Test signal: 3GPP; test model 1; 64 DPCH; PAR = 8.4 dB at 0.01 % probability on CCDF; carrier spacing
5 MHz.
1.2 Features and benefits
Excellent ruggedness
High efficiency
Low R
th
providing excellent thermal stability
Designed for broadband operation (2000 MHz to 2200 MHz)
Lower output capacitance for improved performance in Doherty applications
Designed for low memory effects providing excellent pre-distortability
Internally matched for ease of use
Integrated ESD protection
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
RF power amplifiers for W-CDMA base stations and multi carrier applications in the
2000 MHz to 2200 MHz frequency range
NXP Semiconductors
BLF7G22L-100P; BLF7G22LS-100P
Power LDMOS transistor
2. Pinning information
Table 2.
Pin
1
2
3
4
5
Pinning
Description
drain1
drain2
gate1
gate2
source
[1]
Simplified outline
Graphic symbol
BLF7G22L-100P (SOT1121A)
1
2
1
3
5
3
4
2
sym117
5
4
BLF7G22LS-100P (SOT1121B)
1
2
3
4
5
drain1
drain2
gate1
gate2
source
[1]
1
2
1
5
3
5
4
3
4
2
sym117
[1]
Connected to flange.
3. Ordering information
Table 3.
Ordering information
Package
Name Description
BLF7G22L-100P
-
flanged LDMOST ceramic package; 2 mounting holes;
4 leads
earless flanged LDMOST ceramic package; 4 leads
Version
SOT1121A
SOT1121B
Type number
BLF7G22LS-100P -
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
GS
T
stg
T
j
Parameter
drain-source voltage
gate-source voltage
storage temperature
junction temperature
Conditions
Min
-
0.5
65
-
Max
65
+13
+150
200
Unit
V
V
C
C
BLF7G22L-100P_BLF7G22LS-100P
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 2 January 2012
2 of 14
NXP Semiconductors
BLF7G22L-100P; BLF7G22LS-100P
Power LDMOS transistor
5. Thermal characteristics
Table 5.
Symbol
R
th(j-c)
Thermal characteristics
Parameter
thermal resistance from junction to case
Conditions
T
case
= 80
C;
P
L
= 20 W
Typ
0.36
Unit
K/W
6. Characteristics
Table 6.
Characteristics
T
j
= 25
C; per section unless otherwise specified.
Symbol Parameter
V
GS(th)
I
DSS
I
DSX
I
GSS
g
fs
R
DS(on)
gate-source threshold voltage
drain leakage current
drain cut-off current
gate leakage current
forward transconductance
Conditions
V
DS
= 10 V; I
D
= 60 mA
V
GS
= 0 V; V
DS
= 28 V
V
GS
= V
GS(th)
+ 3.75 V;
V
DS
= 10 V
V
GS
= 11 V; V
DS
= 0 V
V
DS
= 10 V; I
D
= 60 mA
Min
65
1.5
-
-
-
-
-
Typ
70
2
-
12.3
-
530
240
Max
-
2.3
2
-
200
-
-
Unit
V
V
A
A
nA
mS
m
V
(BR)DSS
drain-source breakdown voltage V
GS
= 0 V; I
D
= 0.6 mA
drain-source on-state resistance V
GS
= V
GS(th)
+ 3.75 V;
I
D
= 2100 mA
7. Test information
Table 7.
Functional test information
Test signal: 2-carrier W-CDMA; PAR = 8.4 dB at 0.01 % probability on the CCDF; 3GPP test model
1, 1-64 PDPCH; f
1
= 2112.5 MHz; f
2
= 2117.5 MHz; f
3
= 2162.5 MHz; f
4
= 2167.5 MHz;
RF performance at V
DS
= 28 V; I
Dq
= 720 mA; T
case
= 25
C; 2 sections combined unless otherwise
specified; in a class-AB production test circuit.
Symbol
P
L(AV)
G
p
RL
in
D
ACPR
5M
Parameter
average output power
power gain
input return loss
drain efficiency
adjacent channel power ratio (5 MHz)
P
L(AV)
= 20 W
P
L(AV)
= 20 W
P
L(AV)
= 20 W
P
L(AV)
= 20 W
Conditions
Min Typ Max Unit
-
-
24
-
20
-
W
dB
dB
%
dBc
17.8 19.1 -
16 9
28.5 -
34 28
7.1 Ruggedness in class-AB operation
The BLF7G22L-100P and BLF7G22LS-100P are capable of withstanding a load
mismatch corresponding to VSWR = 10 : 1 through all phases under the following
conditions: V
DS
= 28 V; I
Dq
= 720 mA; P
L
= 100 W (CW); f = 2110 MHz.
BLF7G22L-100P_BLF7G22LS-100P
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 2 January 2012
3 of 14
NXP Semiconductors
BLF7G22L-100P; BLF7G22LS-100P
Power LDMOS transistor
7.2 Impedance information
Table 8.
Typical push-pull impedance
Measured load pull data. Typical values unless otherwise specified.
f
MHz
2110
2140
2170
Z
S
1.79 j4.95
2.37
j5.49
2.54
j5.86
Z
L
2.27
j3.64
2.27 j3.64
1.84j3.57
gate
Z
S
drain
Z
L
001aal831
Fig 1.
Definition of transistor impedance
BLF7G22L-100P_BLF7G22LS-100P
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 2 January 2012
4 of 14
NXP Semiconductors
BLF7G22L-100P; BLF7G22LS-100P
Power LDMOS transistor
7.3 One Tone CW
35
30
25
20
15
10
5
0
η
D
G
p
aaa-001309
G
p
70
60
50
40
(dB)
η
D
(%)
(1)
(2)
(3)
30
20
10
0
36
40
44
48
P
L
(dBm)
52
V
DS
= 28 V; I
Dq
= 720 mA.
(1) f = 2110 MHz
(2) f = 2140 MHz
(3) f = 2170 MHz
Fig 2.
Power gain and drain efficiency as function of load power; typical values
7.4 One Tone CW-Pulsed
35
30
25
20
15
10
5
0
η
D
G
p
aaa-001310
G
p
70
60
50
40
(dB)
η
D
(%)
(1)
(2)
(3)
30
20
10
0
36
40
44
48
P
L
(dBm)
52
V
DS
= 28 V; I
Dq
= 720 mA.
(1) f = 2110 MHz
(2) f = 2140 MHz
(3) f = 2170 MHz
Fig 3.
Power gain and drain efficiency as a function of load power; typical values
BLF7G22L-100P_BLF7G22LS-100P
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 2 January 2012
5 of 14
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