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74HC165PW,112

Description
HC/UH SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PDIP16
Categorylogic    logic   
File Size131KB,22 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance
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74HC165PW,112 Overview

HC/UH SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PDIP16

74HC165PW,112 Parametric

Parameter NameAttribute value
Brand NameNXP Semiconduc
Is it Rohs certified?conform to
MakerNXP
Parts packaging codeTSSOP
package instructionTSSOP, TSSOP16,.25
Contacts16
Manufacturer packaging codeSOT403-1
Reach Compliance Codecompli
Other featuresCLOCK INHIBIT
Counting directionRIGHT
seriesHC/UH
JESD-30 codeR-PDSO-G16
JESD-609 codee4
length5 mm
Load capacitance (CL)50 pF
Logic integrated circuit typePARALLEL IN SERIAL OUT
Maximum Frequency@Nom-Su24000000 Hz
Humidity sensitivity level1
Number of digits8
Number of functions1
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP16,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
power supply2/6 V
propagation delay (tpd)250 ns
Certification statusNot Qualified
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)6 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceNICKEL PALLADIUM GOLD
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
Trigger typePOSITIVE EDGE
width4.4 mm
minfmax20 MHz
Base Number Matches1
74HC165; 74HCT165
8-bit parallel-in/serial out shift register
Rev. 03 — 14 March 2008
Product data sheet
1. General description
The 74HC165; 74HCT165 are high-speed Si-gate CMOS devices that comply with
JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL).
The 74HC165; 74HCT165 are 8-bit parallel-load or serial-in shift registers with
complementary serial outputs (Q7 and Q7) available from the last stage. When the
parallel load (PL) input is LOW, parallel data from the D0 to D7 inputs are loaded into the
register asynchronously.
When PL is HIGH, data enters the register serially at the DS input and shifts one place to
the right (Q0
Q1
Q2, etc.) with each positive-going clock transition. This feature
allows parallel-to-serial converter expansion by tying the Q7 output to the DS input of the
succeeding stage.
The clock input is a gated-OR structure which allows one input to be used as an active
LOW clock enable (CE) input. The pin assignment for the CP and CE inputs is arbitrary
and can be reversed for layout convenience. The LOW-to-HIGH transition of input CE
should only take place while CP HIGH for predictable operation. Either the CP or the CE
should be HIGH before the LOW-to-HIGH transition of PL to prevent shifting the data
when PL is activated.
2. Features
I
I
I
I
Asynchronous 8-bit parallel load
Synchronous serial input
Complies with JEDEC standard no. 7A
ESD protection:
N
HBM JESD22-A114E exceeds 2000 V
N
MM JESD22-A115-A exceeds 200 V
I
Specified from
−40 °C
to +85
°C
and from
−40 °C
to +125
°C
3. Applications
I
Parallel-to-serial data conversion

74HC165PW,112 Related Products

74HC165PW,112 74HC165PW,118 74HC165DB,112 74HC165DB,118 74HC165BQ,115 74HC165D,652
Description HC/UH SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PDIP16 HC/UH SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PDIP16 HC/UH SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PDSO16 HC/UH SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PDIP16 HC/UH SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PQCC16 HC/UH SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PDSO16
Brand Name NXP Semiconduc NXP Semiconductor NXP Semiconduc NXP Semiconduc NXP Semiconduc NXP Semiconductor
Is it Rohs certified? conform to conform to conform to conform to conform to conform to
Maker NXP NXP NXP NXP NXP NXP
Parts packaging code TSSOP TSSOP SSOP1 SSOP1 QFN SOP
package instruction TSSOP, TSSOP16,.25 4.40 MM, PLASTIC, MO-153, SOT-403-1, TSSOP-16 SSOP, SSOP16,.3 5.30 MM, PLASTIC, MO-150, SOT-338-1, SSOP-16 2.50 X 3.50 MM, 0.85 MM HEIGHT, PLASTIC, MO-241, SOT-763-1, DHVQFN-16 3.90 MM, PLASTIC, MS-012, SOT-109-1, SOP-16
Contacts 16 16 16 16 16 16
Manufacturer packaging code SOT403-1 SOT403-1 SOT338-1 SOT338-1 SOT763-1 SOT109-1
Reach Compliance Code compli compliant compli compli compli compliant
Other features CLOCK INHIBIT CLOCK INHIBIT CLOCK INHIBIT CLOCK INHIBIT CLOCK INHIBIT CLOCK INHIBIT
Counting direction RIGHT RIGHT RIGHT RIGHT RIGHT RIGHT
series HC/UH HC/UH HC/UH HC/UH HC/UH HC/UH
JESD-30 code R-PDSO-G16 R-PDSO-G16 R-PDSO-G16 R-PDSO-G16 R-PQCC-N16 R-PDSO-G16
length 5 mm 5 mm 6.2 mm 6.2 mm 3.5 mm 9.9 mm
Logic integrated circuit type PARALLEL IN SERIAL OUT PARALLEL IN SERIAL OUT PARALLEL IN SERIAL OUT PARALLEL IN SERIAL OUT PARALLEL IN SERIAL OUT PARALLEL IN SERIAL OUT
Humidity sensitivity level 1 1 1 1 1 1
Number of digits 8 8 8 8 8 8
Number of functions 1 1 1 1 1 1
Number of terminals 16 16 16 16 16 16
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
Output polarity COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY COMPLEMENTARY
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TSSOP SSOP SSOP HVQCCN SOP
Encapsulate equivalent code TSSOP16,.25 TSSOP16,.25 SSOP16,.3 SSOP16,.3 LCC16,.1X.14,20 SOP16,.25
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE
Peak Reflow Temperature (Celsius) 260 260 260 260 260 260
power supply 2/6 V 2/6 V 2/6 V 2/6 V 2/6 V 2/6 V
propagation delay (tpd) 250 ns 250 ns 250 ns 250 ns 250 ns 250 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.1 mm 1.1 mm 2 mm 2 mm 1 mm 1.75 mm
Maximum supply voltage (Vsup) 6 V 6 V 6 V 6 V 6 V 6 V
Minimum supply voltage (Vsup) 2 V 2 V 2 V 2 V 2 V 2 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V
surface mount YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
Terminal surface NICKEL PALLADIUM GOLD NICKEL/PALLADIUM/GOLD (NI/PD/AU) Nickel/Palladium/Gold (Ni/Pd/Au) NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD NICKEL/PALLADIUM/GOLD (NI/PD/AU)
Terminal form GULL WING GULL WING GULL WING GULL WING NO LEAD GULL WING
Terminal pitch 0.65 mm 0.65 mm 0.65 mm 0.65 mm 0.5 mm 1.27 mm
Terminal location DUAL DUAL DUAL DUAL QUAD DUAL
Maximum time at peak reflow temperature 30 30 30 30 30 30
Trigger type POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE
width 4.4 mm 4.4 mm 5.3 mm 5.3 mm 2.5 mm 3.9 mm
minfmax 20 MHz 24 MHz 20 MHz 20 MHz 20 MHz 20 MHz
Base Number Matches 1 1 1 1 1 1
JESD-609 code e4 - e4 e4 e4 -
Load capacitance (CL) 50 pF 50 pF 50 pF 50 pF - 50 pF
Maximum Frequency@Nom-Su 24000000 Hz - 24000000 Hz 24000000 Hz 24000000 Hz -
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