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IDT72615L25PFI

Description
Bi-Directional FIFO, 1KX18, 15ns, Synchronous, CMOS, PQFP64, TQFP-64
Categorystorage    storage   
File Size130KB,16 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

IDT72615L25PFI Overview

Bi-Directional FIFO, 1KX18, 15ns, Synchronous, CMOS, PQFP64, TQFP-64

IDT72615L25PFI Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeQFP
package instructionLQFP, QFP64,.66SQ,32
Contacts64
Reach Compliance Codenot_compliant
ECCN codeEAR99
Maximum access time15 ns
Maximum clock frequency (fCLK)40 MHz
period time25 ns
JESD-30 codeS-PQFP-G64
JESD-609 codee0
length14 mm
memory density18432 bit
Memory IC TypeBI-DIRECTIONAL FIFO
memory width18
Humidity sensitivity level3
Number of functions1
Number of terminals64
word count1024 words
character code1000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize1KX18
ExportableYES
Package body materialPLASTIC/EPOXY
encapsulated codeLQFP
Encapsulate equivalent codeQFP64,.66SQ,32
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)240
power supply5 V
Certification statusNot Qualified
Maximum seat height1.6 mm
Maximum slew rate0.23 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationQUAD
Maximum time at peak reflow temperature20
width14 mm
CMOS SyncBiFIFO
TM
256 x 18 x 2 and 512 x 18 x 2
FEATURES:
• Two independent FIFO memories for fully bidirectional data
transfers
• 256 x 18 x 2 organization (IDT72605)
• 512 x 18 x 2 organization (IDT72615)
• Synchronous interface for fast (20ns) read and write cycle times
• Each data port has an independent clock and read/write control
• Output enable is provided on each port as a three-state control
of the data bus
• Built-in bypass path for direct data transfer between two ports
• Two fixed flags, Empty and Full, for both the A-to-B and the B-
to-A FIFO
• Programmable flag offset can be set to any depth in the FIFO
• The synchronous BiFIFO is packaged in a 64-pin TQFP (Thin
Quad Flatpack) and 68-pin PLCC
• Industrial temperature range (–40°C to +85°C)
°
°
IDT72605
IDT72615
DESCRIPTION:
The IDT72605 and IDT72615 are very high-speed, low-power bidirec-
tional First-In, First-Out (FIFO) memories, with synchronous interface for fast
read and write cycle times. The SyncBiFIFO™ is a data buffer that can store
or retrieve information from two sources simultaneously. Two Dual-Port FIFO
memory arrays are contained in the SyncBiFIFO; one data buffer for each
direction.
The SyncBiFIFO has registers on all inputs and outputs. Data is only
transferred into the I/O registers on clock edges, hence the interfaces are
synchronous. Each Port has its own independent clock. Data transfers to the
I/O registers are gated by the enable signals. The transfer direction for each
port is controlled independently by a read/write signal. Individual output enable
signals control whether the SyncBiFIFO is driving the data lines of a port or
whether those data lines are in a high-impedance state.
Bypass control allows data to be directly transferred from input to output
register in either direction.
The SyncBiFIFO has eight flags. The flag pins are Full, Empty, Almost-Full,
and Almost-Empty for both FIFO memories. The offset depths of the Almost-Full
and Almost-Empty flags can be programmed to any location.
The SyncBiFIFO is fabricated using IDT’s high-speed, submicron CMOS
technology.
FUNCTIONAL BLOCK DIAGRAM
D
A0
-D
A17
EN
A
R/W
A
OE
A
HIGH
Z
CONTROL
CLK
A
INPUT REGISTER
OUTPUT REGISTER
MUX
MEMORY
ARRAY
512 x 18
256 x 18
MUX
MEMORY
ARRAY
512 x 18
256 x 18
RESET
LOGIC
RS
CS
A
A
2
A
1
A
0
EF
AB
PAE
AB
PAF
AB
FF
AB
µP
INTERFACE
FLAG
LOGIC
FLAG
LOGIC
EF
BA
PAE
BA
PAF
BA
FF
BA
3
7
POWER
SUPPLY
INPUT REGISTER
V
CC
GND
CLK
B
OE
B
R/W
B
EN
B
HIGH
Z
CONTROL
OUTPUT REGISTER
BYP
B
The SyncBiFIFO is a trademark and the IDT logo is a registered trademark of Integrated Device Technology, Inc.
D
B0
-D
B17
2704 drw 01
INDUSTRIAL TEMPERATURE RANGE
1
©
2000 Integrated Device Technology, Inc.
NOVEMBER 2000
DSC-2704/6
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