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Precision Quad SPST Switches
ADG411/ADG412/ADG413
FEATURES
44 V supply maximum ratings
±15 V analog signal range
Low on resistance (< 35 Ω)
Ultralow power dissipation (35 μW)
Fast switching times
t
ON
< 175 ns
t
OFF
< 145 ns
TTL-/CMOS-compatible
Plug-in replacement for DG411/DG412/DG413
The ADG411, ADG412, and ADG413 contain four independent
SPST switches. The ADG411 and ADG412 differ only in that
the digital control logic is inverted. The ADG411 switches are
turned on with a logic low on the appropriate control input,
while a logic high is required for the ADG412. The ADG413
has two switches with digital control logic similar to that of the
ADG411 while the logic is inverted on the other two switches.
Each switch conducts equally well in both directions when on,
and each has an input signal range that extends to the supplies.
In the off condition, signal levels up to the supplies are blocked.
All switches exhibit break-before-make switching action for use
in multiplexer applications. Inherent in the design is low charge
injection for minimum transients when switching the digital
inputs.
APPLICATIONS
Audio and video switching
Automatic test equipment
Precision data acquisition
Battery-powered systems
Sample-and-hold systems
Communication systems
PRODUCT HIGHLIGHTS
1. Extended signal range
The ADG411, ADG412, and ADG413 are fabricated on an
enhanced LC
2
MOS, giving an increased signal range which
extends fully to the supply rails.
2. Ultralow power dissipation
3. Low R
ON
4. Break-before-make switching
This prevents channel shorting when the switches are
configured as a multiplexer.
5. Single-supply operation
For applications where the analog signal is unipolar, the
ADG411, ADG412, and ADG413 can be operated from a
single-rail power supply. The parts are fully specified with a
single 12 V power supply and remain functional with single
supplies as low as 5 V.
GENERAL DESCRIPTION
The ADG411, ADG412, and ADG413 are monolithic CMOS
devices comprising four independently selectable switches.
They are designed on an enhanced LC
2
MOS process which
provides low power dissipation yet gives high switching speed
and low on resistance.
The on resistance profile is very flat over the full analog input
range ensuring excellent linearity and low distortion when
switching audio signals. Fast switching speed coupled with high
signal bandwidth also make the parts suitable for video signal
switching. CMOS construction ensures ultralow power
dissipation, making the parts ideally suited for portable and
battery-powered instruments.
FUNCTIONAL BLOCK DIAGRAMS
S1
IN1
D1
S2
IN2
D2
S3
IN3
S1
IN1
D1
S2
IN2
S1
IN1
D1
S2
IN2
D2
S3
D3
S4
IN4
00024-002
ADG411
IN3
ADG412
D2
S3
ADG413
IN3
D3
S4
IN4
D4
SWITCHES SHOWN FOR A LOGIC 1 INPUT
00024-001
D3
S4
IN4
D4
SWITCHES SHOWN FOR A LOGIC 1 INPUT
D4
SWITCHES SHOWN FOR A LOGIC 1 INPUT
Figure 1. ADG411
Figure 2. ADG412
Figure 3. ADG413
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.
00024-003
ADG411/ADG412/ADG413
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Functional Block Diagrams ............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Dual Supply ................................................................................... 3
Single Supply ................................................................................. 4
Absolute Maximum Ratings ............................................................5
ESD Caution...................................................................................5
Pin Configuration and Function Descriptions..............................6
Typical Performance Characteristics ..............................................7
Terminology .......................................................................................9
Applications..................................................................................... 10
Test Circuits ..................................................................................... 11
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 15
REVISION HISTORY
6/10—Rev. C to Rev. D
Updated Outline Dimensions ....................................................... 13
Changes to Ordering Guide .......................................................... 15
11/04—Rev. B to Rev. C
Format Updated .................................................................. Universal
Change to Package Drawing (Figure 23) ..................................... 13
Changes to Ordering Guide .......................................................... 14
7/04—Rev. A to Rev. B
Changes to ORDERING GUIDE ..................................................... 5
Updated OUTLINE DIMENSIONS ............................................... 11
Rev. D | Page 2 of 16
ADG411/ADG412/ADG413
SPECIFICATIONS
DUAL SUPPLY
V
DD
= 15 V ± 10%, V
SS
= –15 V ± 10%, V
L
= 5 V ± 10%, GND = 0 V, unless otherwise noted.
1
Table 1.
B Version
−40°C to
+25°C +85°C
V
DD
to V
SS
25
35
±0.1
±0.25
±0.1
±0.25
±0.1
±0.4
±0.25
45
25
35
±0.1
±0.25
±0.1
±0.25
±0.1
±0.4
±20
T Version
−55°C to
+25°C +125°C
V
DD
to V
SS
45
Parameter
ANALOG SWITCH
Analog Signal Range
R
ON
LEAKAGE CURRENTS
Source OFF Leakage I
S
(OFF)
Unit
V
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
μA typ
μA max
ns typ
ns max
ns typ
ns max
ns typ
pC typ
dB typ
dB typ
pF typ
pF typ
pF typ
Test Conditions/Comments
Drain OFF Leakage I
D
(OFF)
±5
±10
2.4
0.8
±20
± 40
2.4
0.8
Channel ON Leakage I
D
, I
S
(ON)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
I
INL
or I
INH
DYNAMIC CHARACTERISTICS
t
ON
t
OFF
Break-Before-Make Time Delay, t
D
(ADG413 Only)
Charge Injection
OFF Isolation
Channel-to-Channel Crosstalk
C
S
(OFF)
C
D
(OFF)
C
D
, C
S
(ON)
POWER REQUIREMENTS
I
DD
I
SS
I
L
2
V
D
= ±8.5 V, I
S
= −10 mA;
V
DD
= +13.5 V, V
SS
= −13.5 V
V
DD
= +16.5 V, V
SS
= −16.5 V
V
D
= +15.5 V/−15.5 V,
V
S
= −15.5 V/+15.5 V;
Figure 15
V
D
= +15.5 V/−15.5 V,
V
S
= −15.5 V/+15.5 V;
Figure 15
V
D
= V
S
= +15.5 V/−15.5 V;
Figure 16
0.005
±0.5
110
175
100
145
25
5
68
85
9
9
35
0.005
±0.5
110
175
100
145
25
5
68
85
9
9
35
V
IN
= V
INL
or V
INH
R
L
= 300 Ω, C
L
= 35 pF;
V
S
= ±10 V; Figure 17
R
L
= 300 Ω, C
L
= 35 pF;
V
S
= ±10 V; Figure 17
R
L
= 300 Ω, C
L
= 35 pF;
V
S1
= V
S2
= 10 V; Figure 18
V
S
= 0 V, R
S
= 0 Ω, C
L
= 10 nF;
Figure 19
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz;
Figure 20
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz;
Figure 21
f = 1 MHz
f = 1 MHz
f = 1 MHz
V
DD
= +16.5 V, V
SS
= −16.5 V; Digital
inputs = 0 V or 5 V
0.0001
1
0.0001
1
0.0001
1
5
5
5
0.0001
1
0.0001
1
0.0001
1
5
5
5
μA typ
μA max
μA typ
μA max
μA typ
μA max
1
2
Temperature ranges are as follows: B versions: −40°C to +85°C; T versions: −55°C to +125°C.
Guaranteed by design; not subject to production test.
Rev. D | Page 3 of 16
ADG411/ADG412/ADG413
SINGLE SUPPLY
V
DD
= 12 V ± 10%, V
SS
= 0 V, V
L
= 5 V ± 10%, GND = 0 V, unless otherwise noted.
1
Table 2.
Parameter
ANALOG SIGNAL RANGE
R
ON
LEAKAGE CURRENTS
Source OFF Leakage I
S
(OFF)
Drain OFF Leakage I
D
(OFF)
Channel ON Leakage I
D
, I
S
(ON)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
I
INL
or I
INH
DYNAMIC CHARACTERISTICS
t
ON
t
OFF
Break-Before-Make Time
Delay, t
D
(ADG413 Only)
Charge Injection
OFF Isolation
Channel-to-Channel Crosstalk
C
S
(OFF)
C
D
(OFF)
C
D
, C
S
(ON)
POWER REQUIREMENTS
I
DD
I
L
2
+25°C
40
80
±0.1
±0.25
±0.1
±0.25
±0.1
±0.4
B Version
−40°C to + 85°C
0 V to V
DD
100
T Version
+25°C
−55°C to +125°C
0 V to V
DD
40
80
100
±0.1
±0.25
±0.1
±0.25
±0.1
±0.4
Unit
V
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
μA typ
μA max
ns typ
ns max
ns typ
ns max
ns typ
pC typ
dB typ
dB typ
pF typ
pF typ
pF typ
Test Conditions/Comments
0 < V
D
= 8.5 V, I
S
= −10 mA;
V
DD
= 10.8 V
V
DD
= 13.2 V
V
D
= 12.2 V/1 V, V
S
= 1 V/12.2 V;
Figure 15
V
D
= 12.2 V/1 V, V
S
= 1 V/12.2 V;
Figure 15
V
D
= V
S
= 12.2 V/1 V;
Figure 16
±5
±5
±10
2.4
0.8
±20
±20
±40
2.4
0.8
0.005
±0.5
175
250
95
125
25
25
68
85
9
9
35
0.005
±0.5
175
250
95
125
25
25
68
85
9
9
35
V
IN
= V
INL
or V
INH
R
L
= 300 Ω, C
L
= 35 pF;
V
S
= 8 V; Figure 17
R
L
= 300 Ω, C
L
= 35 pF;
V
S
= 8 V; Figure 17
R
L
= 300 Ω, C
L
= 35 pF;
V
S1
= V
S2
= +10 V; Figure 18
V
S
= 0 V, R
S
= 0 Ω, C
L
= 10 nF;
Figure 19
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz;
Figure 20
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz;
Figure 21
f = 1 MHz
f = 1 MHz
f = 1 MHz
V
DD
= 13.2 V;
Digital inputs = 0 V or 5 V
0.0001
1
0.0001
1
5
5
0.0001
1
0.0001
1
5
5
μA typ
μA max
μA typ
μA max
V
L
= 5.25 V
1
2
Temperature ranges are as follows: B versions:−40°C to +85°C; T versions: −55°C to +125°C.
Guaranteed by design; not subject to production test.
Table 3. Truth Table (ADG411/ADG412)
ADG411 In
0
1
ADG412 In
1
0
Switch Condition
ON
OFF
Table 4. Truth Table (ADG413)
Logic
0
1
Switch 1, 4
OFF
ON
Switch 2, 3
ON
OFF
Rev. D | Page 4 of 16
FPGA/CPLD
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