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UPA1434H-AZ

Description
3A, 60V, 4 CHANNEL, NPN, Si, POWER TRANSISTOR
CategoryDiscrete semiconductor    The transistor   
File Size54KB,6 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Environmental Compliance
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UPA1434H-AZ Overview

3A, 60V, 4 CHANNEL, NPN, Si, POWER TRANSISTOR

UPA1434H-AZ Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerRenesas Electronics Corporation
package instructionIN-LINE, R-PSIP-T10
Reach Compliance Codeunknown
ECCN codeEAR99
Factory Lead Time1 week
Maximum collector current (IC)3 A
Collector-emitter maximum voltage60 V
Configuration2 BANKS, COMMON EMITTER, 2 ELEMENTS
Minimum DC current gain (hFE)500
JESD-30 codeR-PSIP-T10
Number of components4
Number of terminals10
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)260
Polarity/channel typeNPN
Certification statusNot Qualified
surface mountNO
Terminal formTHROUGH-HOLE
Terminal locationSINGLE
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON

UPA1434H-AZ Preview

DATA SHEET
SILICON TRANSISTOR ARRAY
µ
PA1434
NPN SILICON POWER TRANSISTOR ARRAY
LOW SPEED SWITCHING USE
INDUSTRIAL USE
DESCRIPTION
The
µ
PA1434 is NPN silicon epitaxial Power Transistor
Array that built in 4 circuits designed for driving solenoid,
relay, lamp and so on.
26.8 MAX.
4.0
PACKAGE DIMENSION
(in millimeters)
FEATURES
Easy mount by 0.1 inch of terminal interval.
High h
FE
. Low V
CE(sat)
.
h
FE
= 800 to 3200 (at I
C
= 0.5 A)
V
CE(sat)
= 0.5 V
MAX.
10
(at I
C
= 2 A)
ORDERING INFORMATION
Part Number
Package
10 Pin SIP
Quality Grade
Standard
2.54
1.4
0.6 ±0.1
1.4
0.5 ±0.1
µ
PA1434H
1 2 3 4 5 6 7 8 910
Please refer to “Quality grade on NEC Semiconductor
Device” (Document number IEI-1209) published by NEC
Corporation to know the specification of quality grade on
the devices and its recommended applications.
2
CONNECTION DIAGRAM
3
4
5
6
7
8
9
ABSOLUTE MAXIMUM RATINGS (T
a
= 25 ˚C)
Collector to Base Voltage
Emitter to Base Voltage
Collector Current (DC)
Collector Current (pulse)
Base Current (DC)
Total Power Dissipation
(T
a
= 25 ˚C)
Total Power Dissipation
(T
c
= 25 ˚C)
Junction Temperature
Storage Temperature
**
4 Circuits
T
j
T
stg
150
–55 to +150
˚C
˚C
P
T2
**
28
W
V
CBO
V
EBO
I
C(DC)
I
C(pulse)
*
I
B(DC)
P
T1
**
60
60
7
3
6
0.6
3.5
V
V
V
A/unit
A/unit
A/unit
W
Collector to Emitter Voltage V
CEO
1
10 MIN.
10
2.5
PIN NO.
2, 4, 6, 8: Base (B)
3, 5, 7, 9: Collector (C)
1, 10: Emitter (E)
*
PW
300
µ
s, Duty Cycle
10 %
The information in this document is subject to change without notice.
Document No. IC-3480
Date Published September 1994 P
Printed in Japan
©
1994
µ
PA1434
ELECTRICAL CHARACTERISTICS (T
a
= 25 ˚C)
CHARACTERISTIC
Collector Leakage Current
Emitter Leakage Current
DC Current Gain
DC Current Gain
Collector Saturation Voltage
Base Saturation Voltage
Turn On Time
Storage Time
Fall Time
SYMBOL
I
CBO
I
EBO
h
FE1
h
FE2
MIN.
TYP.
MAX.
10
10
UNIT
TEST CONDITIONS
V
CB
= 60 V, I
E
= 0
V
EB
= 5 V, I
C
= 0
V
CE
= 5 V, I
C
= 0.5 A
V
CE
= 5 V, I
C
= 3 A
I
C
= 2 A, I
B
= 20 mA
I
C
= 2 A, I
B
= 20 mA
I
C
= 2 A
I
B1
= –I
B2
= 10 mA
.
.
V
CC
= 50 V, R
L
= 25
.
.
See test circuit
µ
A
µ
A
*
*
800
500
3200
V
CE(sat)
*
V
BE(sat)
*
t
on
t
stg
t
f
1
3
1.5
0.5
1.2
V
V
µ
s
µ
s
µ
s
*
PW
350
µ
s, Duty Cycle
2 % /pulsed
SWITCHING TIME TEST CIRCUIT
R
L
= 25
V
IN
I
B1
I
B2
PW
PW = 50
µ
s
Duty Cycle
2 %
V
BB
= –5 V
T.U.T.
V
CC
= 50 V
90 %
Collector Current
Wave Form
t
on
I
C
10 %
t
stg
t
f
I
C
Base Current
Wave Form
I
B1
I
B2
2
µ
PA1434
TYPICAL CHARACTERISTICS (T
a
= 25 ˚C)
DERATING CURVE OF SAFE
OPERATING AREA
10
5
SAFE OPERATING AREA
I
C(pulse)
MAX.
I
C(DC)
MAX.
PW
Di
Lim ssip
ite atio
n
d
dT - Percentage of Rated Current - %
100
80
I
C
- Collector Current - A
=
10
30
µ
0
s
30
µ
s
0
s
µ
s
m
1
10
1
0.5
S/
bL
50
im
m
b
S/
60
ite
s
Di
ss
at
ip
n
io
d
m
Li
d
ite
m
Li
40
0.1
0.05
20
T
C
= 25 ˚C
Single Pulse
1
5
10
50
0.01
0
50
100
150
T
C
- Case Temperature - ˚C
V
CEO
MAX.
100
4 Circuits
Operation
3 Circuits
Operation
2 Circuits
Operation
1 Circuit
Operation
50
75
100
125
150
50
20
10
5
2
1
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
30
NEC
µ
PA1434H
d
ite
V
CE
- Collector to Emitter Voltage - V
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
P
T
- Total Power Dissipation - W
P
T
- Total Power Dissipation - W
4
20
4 Circuits Operation
3 Circuits Operation
3
2 Circuits Operation
1 Circuit Operation
2
10
1
0
25
50
75
100
125
150
0
25
T
a
- Ambient Temperature - ˚C
T
C
- Case Temperature - ˚C
TRANSIENT THERMAL RESISTANCE
100
5
V
CE
10 V
4
10
COLLECTOR CURRENT vs. COLLECTOR TO
EMITTER VOLTAGE
R
th(j-c)
- Transient Thermal Resistance - ˚C/W
I
C
- Collector Current - A
3
2
1
1
A
I
B
= 0.5 m
0.1
0.1
1
10
100
0
1
2
3
4
5
PW - Pulse Width - ms
V
CE
- Collector to Emitter Voltage - V
3
µ
PA1434
DC CURRENT GAIN vs. COLLECTOR CURRENT
10000
V
CE(sat)
- Collector Saturation Voltage - V
V
BE(sat)
- Base Saturation Voltage - V
V
CE
= 5 V
Pulsed
5000
10
5
2
1
V
BE(sat)
BASE AND COLLECTOR SATURATION
VOLTAGE vs.COLLECTOR CURRENT
I
C
= 100·I
B
Pulsed
h
FE
- DC Current Gain
2000
T
a
= 12
5 ˚C
0.5
0.2
0.1
0.05
V
CE(sat)
1000
75 ˚C
25 ˚C
–25 ˚C
500
200
100
0.001
0.02
0.005 0.01
0.05 0.1
0.5 1
5 10
0.01
0.001
0.005 0.01
0.05 0.1
0.5 1
5 10
I
C
- Collector Current - A
I
C
- Collector Current - A
4
µ
PA1434
REFERENCE
Document Name
NEC semiconductor device reliability/quality control system.
Quality grade on NEC semiconductor devices.
Semiconductor device mounting technology manual.
Semiconductor device package manual.
Guide to quality assurance for semiconductor devices.
Semiconductor selection guide.
Document No.
TEI-1202
IEI-1209
IEI-1207
IEI-1213
MEI-1202
MF-1134
5

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