The HY57V12820 is a 512-Mbit CMOS Synchronous DRAM, ideally suited for the main memory applications which require large mem-
ory density and high bandwidth. The HY57V12820 is organized as 4banks of 16,777,216x8.
The HY57V12820 is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchro-
nized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output
voltage levels are compatible with LVTTL.
Programmable options include the length of pipeline (Read latency of 2 or 3), the number of consecutive read or write cycles initiated by
a single control command (Burst length of 1,2,4,8 or full page), and the burst count sequence(sequential or interleave). A burst of read or
write cycles in progress can be terminated by a burst terminate command or can be interrupted and replaced by a new burst read or
write command on any cycle. (This pipelined design is not restricted by a `2N` rule.)
FEATURES
•
•
•
Single 3.3±0.3V power supply
All device pins are compatible with LVTTL interface
JEDEC standard 400mil 54pin TSOP-II with 0.8mm of pin
pitch
All inputs and outputs referenced to positive edge of system
clock
Data mask function by DQM
Internal four banks operation
•
•
•
•
Auto refresh and self refresh
8192 refresh cycles / 64ms
Programmable Burst Length and Burst Type
- 1, 2, 4, 8 or Full page for Sequential Burst
•
- 1, 2, 4 or 8 for Interleave Burst
Programmable CAS Latency ; 2, 3 Clocks
•
•
ORDERING INFORMATION
Part No.
HY57V12820T-6
HY57V12820T-K
HY57V12820T-H
HY57V12820T-8
HY57V12820T-P
HY57V12820T-S
HY57V12820LT-6
HY57V12820LT-K
HY57V12820LT-H
HY57V12820LT-8
HY57V12820LT-P
HY57V12820LT-S
Clock Frequency
166MHz
133MHz
133MHz
125MHz
100MHz
100MHz
166MHz
133MHz
133MHz
125MHz
100MHz
100MHz
Power
Organization
Interface
Package
Normal
4Banks x 16Mbits x8
LVTTL
400mil 54pin TSOP II
Low power
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of
circuits described. No patent licenses are implied.
Rev. 0.4/Jul. 02
1
HY57V12820(L)T
PIN CONFIGURATION
V
DD
DQ0
V
DDQ
NC
DQ1
V
SSQ
NC
DQ2
V
DDQ
NC
DQ3
V
SSQ
NC
V
DD
NC
/WE
/CAS
/RAS
/CS
BA0
BA1
A10/AP
A0
A1
A2
A3
V
DD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
54
53
52
51
50
49
48
47
46
45
44
43
54pin TSOP II 42
400mil x 875mil 41
0.8mm pin pitch 40
39
38
37
36
35
34
33
32
31
30
29
28
V
SS
DQ7
V
SSQ
NC
DQ6
V
DDQ
NC
DQ5
V
SSQ
NC
DQ4
V
DDQ
NC
V
SS
NC
DQM
CLK
CKE
A12
A11
A9
A8
A7
A6
A5
A4
V
SS
PIN DESCRIPTION
PIN
CLK
CKE
CS
BA0, BA1
A0 ~ A12
Clock
Clock Enable
Chip Select
Bank Address
Address
Row Address Strobe,
Column Address Strobe,
Write Enable
Data Input/Output Mask
Data Input/Output
Power Supply/Ground
Data Output Power/Ground
No Connection
PIN NAME
DESCRIPTION
The system clock input. All other inputs are registered to the SDRAM on the
rising edge of CLK
Controls internal clock signal and when deactivated, the SDRAM will be one
of the states among power down, suspend or self refresh
Enables or disables all inputs except CLK, CKE and DQM
Selects bank to be activated during RAS activity
Selects bank to be read/written during CAS activity
Dear friends, I have never been exposed to dsp, and I came across the RF5 reference framework directly. My goal is to learn how to modify it to develop a program of my own. The theory is confusing, bu...
During the recent test, it was found that the data read by STM32 ADC using DMA mode would appear as follows
I started to suspect that it was high-frequency interference from external signals. After a ...
raw-os has been updated to version 1091. Please download it from the official website: http://www.raw-os.org/Download.html. For the revision history, please refer to: https://github.com/jorya/raw-os....
I use PLL to generate 6 divided clocks, but only one divided clock can be used at the same time. Quartus optimizes the other unused divided clocks and only routes one clock. Is there any way to preven...
ECG ten electrodes and 12 leads1. I don't know much about how to obtain electrocardiogram information using ECG. Why is ECG called 12-lead when it only has ten electrodes? What is the relationship bet...
According to foreign media reports, Ford Motor has applied to the U.S. Patent and Social Security Administration (USPTO) for a patent for a remote vehicle control system that may be used in future ...[Details]
A parallel inverter consists of two thyristors (T1 and T2), a capacitor, a center-tapped transformer, and an inductor. The thyristors provide a current path, while the inductor L maintains a consta...[Details]
introduction
Bluetooth technology is a short-range wireless communication technology designed to replace wired cables. It is a wireless communication technology standard developed by the SIG, ...[Details]
ISP devices, such as field programmable devices (FPGAs and CPLDs), do not require a programmer. Using programming kits provided by the device manufacturer, they employ a top-down modular design app...[Details]
In recent years, many people have switched to new energy vehicles, and this type of vehicle has indeed been highly sought after and is considered the future direction of automobile development, and...[Details]
On August 25th, TSMC, the world's leading contract chip manufacturer, attracted significant attention for its decision to build a chip manufacturing facility in Arizona. TSMC primarily manufactures...[Details]
On August 18th, Galaxis, a specialist in integrated intelligent intralogistics robotics, officially unveiled its next-generation, ultra-narrow aisle forklift mobile robot, the "VFR Ultra-Narrow Ser...[Details]
Have you ever heard stories about "crazy appliances"? Think of microwaves that turn on automatically or ovens that preheat without any human input? With radios and electromagnetic interfaces ubiqui...[Details]
A half-bridge is an inverter topology for converting DC to AC. A typical half-bridge circuit consists of two controller switches, a three-wire DC power supply, two feedback diodes, and two capacito...[Details]
In the electronics manufacturing industry, surface mount technology (SMT) placement machines are core equipment for production lines. However, with many different models available on the market, ch...[Details]
Compared to cloud databases, minicomputers are purpose-built for decentralized, rugged computing at the edge of the network. By moving applications, analytics, and processing services closer to the...[Details]
Over the past decade, the narrative surrounding fuel vehicles has been one of decline and replacement. Under the onslaught of new energy vehicles, traditional automakers have been forced to acceler...[Details]
Inverter power supplies on the market can generally be divided into two categories: sine wave inverters and square wave inverters. Some engineers also like to categorize pure sine wave inverters as...[Details]
For new energy vehicles, the importance of batteries is unquestionable. Not only does it determine the performance of the vehicle, but the battery density also has a great relationship with the veh...[Details]
When American cartoonist Chester Gould sketched the watch on Dick Tracy's wrist, he had no idea that science fiction would become reality 70 years later. As a comic strip artist, Gould imagined fut...[Details]
Embedded System
京公网安备 11010802033920号
EEWORLD
