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TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW NOISE JFET INPUT OPERATIONAL AMPLIFIERS
SLOS080I − SEPTEMBER 1978 − REVISED APRIL 2004
D
Low Power Consumption
D
Wide Common-Mode and Differential
D
D
D
Voltage Ranges
Low Input Bias and Offset Currents
Output Short-Circuit Protection
Low Total Harmonic Distortion
. . . 0.003% Typ
D
Low Noise
D
D
D
D
D
V
n
= 18 nV/√Hz Typ at f = 1 kHz
High Input Impedance . . . JFET Input Stage
Internal Frequency Compensation
Latch-Up-Free Operation
High Slew Rate . . . 13 V/µs Typ
Common-Mode Input Voltage Range
Includes V
CC+
description/ordering information
The JFET-input operational amplifiers in the TL07x series are similar to the TL08x series, with low input bias
and offset currents and fast slew rate. The low harmonic distortion and low noise make the TL07x series ideally
suited for high-fidelity and audio preamplifier applications. Each amplifier features JFET inputs (for high input
impedance) coupled with bipolar output stages integrated on a single monolithic chip.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from −40°C to 85°C. The M-suffix devices are characterized for operation over the full military
temperature range of −55°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
2004, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL PRF 38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
1
SLOS080I − SEPTEMBER 1978 − REVISED APRIL 2004
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW NOISE JFET INPUT OPERATIONAL AMPLIFIERS
description/ordering information (continued)
ORDERING INFORMATION
TA
VIOmax
AT 25°C
PDIP (P)
PDIP (N)
PACKAGE†
Tube of 50
Tube of 50
Tube of 25
Tube of 75
Reel of 2500
Tube of 75
SOIC (D)
10 mV
SOP (NS)
SOP (PS)
Reel of 2500
Tube of 50
Reel of 2500
Reel of 2000
Reel of 2000
Reel of 2000
Reel of 2000
TSSOP (PW)
Tube of 90
Reel of 2000
Tube of 50
PDIP (P)
PDIP (N)
0°C to 70°C
Tube of 50
Tube of 25
Tube of 75
Reel of 2500
6 mV
Tube of 75
SOIC (D)
Reel of 2500
Tube of 50
Reel of 2500
SOP (PS)
SOP (NS)
PDIP (P)
PDIP (N)
Reel of 2000
Reel of 2000
Tube of 50
Tube of 50
Tube of 25
Tube of 75
Reel of 2500
3 mV
SOIC (D)
Tube of 75
Reel of 2500
Tube of 50
Reel of 2500
SOP (NS)
Reel of 2000
ORDERABLE
PART NUMBER
TL071CP
TL072CP
TL074CN
TL071CD
TL071CDR
TL072CD
TL072CDR
TL074CD
TL074CDR
TL074CNSR
TL071CPSR
TL072CPSR
TL072CPWR
TL074CPW
TL074CPWR
TL071ACP
TL072CP
TL074ACN
TL071ACD
TL071ACDR
TL072ACD
TL072ACDR
TL074ACD
TL074ACDR
TL072ACPSR
TL074ACNSR
TL071BCP
TL072BCP
TL074BCN
TL071BCD
TL071BCDR
TL072BCD
TL072BCDR
TL074BCD
TL074BCDR
TL074BCNSR
TL074BC
TL074B
072BC
071BC
TL074AC
T072A
TL074A
TL071BCP
TL072BCP
TL074BCN
072AC
071AC
T074
TL071ACP
TL072CP
TL074ACN
TL074C
TL074
TL071
T072
T072
TL072C
TL071C
TOP-SIDE
MARKING
TL071CP
TL072CP
TL074CN
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
2
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW NOISE JFET INPUT OPERATIONAL AMPLIFIERS
SLOS080I − SEPTEMBER 1978 − REVISED APRIL 2004
description/ordering information (continued)
ORDERING INFORMATION
TA
VIOmax
AT 25°C
PDIP (P)
PDIP (N)
PACKAGE†
Tube of 50
Tube of 50
Tube of 25
Tube of 75
−40 C 85 C
−40°C to 85°C
6 mV
SOIC (D)
Reel of 2500
Tube of 75
Reel of 2500
Tube of 50
Reel of 2500
CDIP (JG)
6 mV
−55°C to 125°C
9 mV
CFP (U)
LCCC (FK)
CDIP (J)
CFP (W)
LCCC (FK)
Tube of 50
Tube of 150
Tube of 55
Tube of 25
Tube of 25
Tube of 55
ORDERABLE
PART NUMBER
TL071IP
TL072IP
TL074IN
TL071ID
TL071IDR
TL072ID
TL072IDR
TL074ID
TL074IDR
TL072MJGB
TL072MUB
TL072MFKB
TL074MJB
TL074MWB
TL074MFKB
TL074I
TL072MJGB
TL072MUB
TL072MFKB
TL074MJB
TL074MWB
TL074MFKB
TL072I
TL071I
TOP-SIDE
MARKING
TL071IP
TL072IP
TL074IN
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
3
SLOS080I − SEPTEMBER 1978 − REVISED APRIL 2004
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW NOISE JFET INPUT OPERATIONAL AMPLIFIERS
TL071, TL071A, TL071B
D, P, OR PS PACKAGE
(TOP VIEW)
TL072, TL072A, TL072B
D, JG, P, PS, OR PW PACKAGE
(TOP VIEW)
TL074A, TL074B
D, J, N, NS, OR PW PACKAGE
TL074 . . . D, J, N, NS, PW,
OR W PACKAGE
(TOP VIEW)
OFFSET N1
IN−
IN+
V
CC−
1
2
3
4
8
7
6
5
NC
V
CC+
OUT
OFFSET N2
1OUT
1IN−
1IN+
V
CC−
1
2
3
4
8
7
6
5
V
CC+
2OUT
2IN−
2IN+
TL072
U PACKAGE
(TOP VIEW)
1OUT
1IN−
1IN+
V
CC+
2IN+
2IN−
2OUT
1
2
3
4
5
6
7
14
13
12
11
10
9
8
4OUT
4IN−
4IN+
V
CC−
3IN+
3IN−
3OUT
NC
1OUT
1IN−
1IN+
V
CC−
TL071
FK PACKAGE
(TOP VIEW)
1
2
3
4
5
10
9
8
7
6
NC
V
CC+
2OUT
2IN−
2IN+
TL074
FK PACKAGE
(TOP VIEW)
TL072
FK PACKAGE
(TOP VIEW)
NC
OFFSET N1
NC
NC
NC
NC
1OUT
NC
V CC+
NC
V CC−
NC
2IN+
NC
NC − No internal connection
symbols
TL071
OFFSET N1
IN+
IN−
OFFSET N2
+
OUT
−
IN−
−
IN+
TL072 (each amplifier)
TL074 (each amplifier)
+
OUT
V CC−
NC
OFFSET N2
NC
NC
4
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
2IN−
2OUT
NC
3OUT
3IN−
NC
NC
IN−
NC
IN+
NC
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
NC
V
CC+
NC
OUT
NC
NC
1IN−
NC
1IN+
NC
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
NC
2OUT
NC
2IN−
NC
1IN+
NC
V
CC+
NC
2IN+
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
1IN−
1OUT
NC
4OUT
4IN−
4IN+
NC
V
CC−
NC
3IN+
FPGA/CPLD
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