BUK9107-55ATE
N-channel TrenchPLUS logic level FET
Rev. 02 — 16 February 2009
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. The devices include TrenchPLUS diodes for
ElectroStatic Discharge (ESD) protection and temperature sensing. This product has been
designed and qualified to the appropriate AEC standard for use in automotive critical
applications.
1.2 Features and benefits
Allows responsive temperature
monitoring due to integrated
temperature sensor
Q101 compliant
Electrostatically robust due to
integrated protection diodes
Low conduction losses due to low
on-state resistance
1.3 Applications
12 V and 24 V high power motor
drives
Automotive and general purpose
power switching
Electrical Power Assisted Steering
(EPAS)
Protected drive for lamps
1.4 Quick reference data
Table 1.
V
DS
I
D
P
tot
T
j
R
DSon
Quick reference
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
V
GS
= 5 V; T
mb
= 25 °C; see
Figure 2
and
3
T
mb
= 25 °C; see
Figure 1
Min
-
[1]
-
-
-55
V
GS
= 4.5 V; I
D
= 50 A; T
j
= 25 °C
V
GS
= 10 V; I
D
= 50 A; T
j
= 25 °C
V
GS
= 5 V; I
D
= 50 A; T
j
= 25 °C; see
Figure 7
and
8
S
F(TSD)
V
F(TSD)
temperature sense diode I
F
= 250 µA; T
j
> -55 °C; T
j
< 175 °C
temperature coefficient
temperature sense diode I
F
= 250 µA; T
j
= 25 °C
forward voltage
[1]
Current is limited by power dissipation chip rating.
Symbol Parameter
drain-source voltage
drain current
total power dissipation
junction temperature
drain-source on-state
resistance
Typ
-
-
-
-
6
5.2
5.8
Max
55
140
272
175
7.7
6.2
7
Unit
V
A
W
°C
mΩ
mΩ
mΩ
Static characteristics
-
-
-
-1.4
648
-1.54 -1.68 mV/K
658
668
mV
NXP Semiconductors
BUK9107-55ATE
N-channel TrenchPLUS logic level FET
2. Pinning information
Table 2.
Pin
1
2
3
4
5
mb
Pinning information
Symbol
G
A
D
K
S
D
Description
gate
anode
drain
cathode
source
mounting base; connected to
drain
1 2
3
45
S
K
mbl317
Simplified outline
mb
Graphic symbol
D
A
G
SOT426
(D2PAK)
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
BUK9107-55ATE D2PAK
plastic single-ended surface-mounted package (D2PAK); 5 leads (one
lead cropped)
Version
SOT426
BUK9107-55ATE_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 16 February 2009
2 of 15
NXP Semiconductors
BUK9107-55ATE
N-channel TrenchPLUS logic level FET
4. Limiting values
Table 4.
Symbol
V
DS
V
GS
I
D
Limiting values
Parameter
drain-source voltage
gate-source voltage
drain current
T
mb
= 25 °C; V
GS
= 5 V; see
Figure 2;
see
Figure 3
T
mb
= 100 °C; V
GS
= 5 V; see
Figure 2
I
DM
P
tot
I
GS(CL)
peak drain current
total power dissipation
gate-source clamping
current
T
mb
= 25 °C; t
p
≤
10 µs; pulsed; see
Figure 3
T
mb
= 25 °C; see
Figure 1
continuous
pulsed; t
p
= 5 ms;
δ
= 0.01
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
[1]
[2]
[3]
[3]
Min
-
-15
-
-
-
-
-
-
-
-100
-55
-55
-
T
mb
= 25 °C
t
p
≤
10 µs; pulsed; T
mb
= 25 °C
[2]
[3]
I
SM
Clamping
E
DS(CL)S
non-repetitive drain-source I
D
= 75 A; V
DS
≤
55 V; V
GS
= 5 V; R
GS
= 50
Ω;
clamping energy
unclamped; T
j(init)
= 25 °C
electrostatic discharge
voltage
[1]
[2]
[3]
In accordance with the Absolute Maximum Rating System (IEC 60134).
Max
55
15
140
75
75
560
272
10
50
100
175
175
55
140
75
560
500
Unit
V
V
A
A
A
A
W
mA
mA
V
°C
°C
V
A
A
A
mJ
V
isol(FET-TSD)
FET to temperature sense
diode isolation voltage
T
stg
T
j
V
DGS
I
S
storage temperature
junction temperature
drain-gate voltage
source current
peak source current
Source-drain diode
-
-
-
-
Electrostatic discharge
V
esd
HBM; C = 100 pF; R = 1.5 kΩ; pins 1, 3, 5
-
6
kV
Voltage is limited by clamping.
Current is limited by power dissipation chip rating.
Continuous current is limited by package.
BUK9107-55ATE_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 16 February 2009
3 of 15
NXP Semiconductors
BUK9107-55ATE
N-channel TrenchPLUS logic level FET
120
P
der
(%)
80
03na19
150
ID
(A)
125
03ne74
100
75
Capped at 75 A due to package
40
50
25
0
0
50
100
150
T
mb
(°C)
200
0
25
50
75
100
125
150
175
200
Tmb (oC)
Fig 2.
Fig 1.
Normalized total power dissipation as a
function of mounting base temperature
Normalized continuous drain current as a
function of mounting base temperature
103
ID
(A)
03nf55
Limit RDSon = VDS/ID
tp = 10
μ
s
102
100
μ
s
Capped at 75 A due to package
1 ms
DC
10
10 ms
100 ms
1
1
10
VDS (V)
102
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
BUK9107-55ATE_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 16 February 2009
4 of 15
NXP Semiconductors
BUK9107-55ATE
N-channel TrenchPLUS logic level FET
5. Thermal characteristics
Table 5.
Symbol
R
th(j-a)
R
th(j-mb)
Thermal characteristics
Parameter
Conditions
Min
-
-
Typ
-
-
Max
50
0.55
Unit
K/W
K/W
thermal resistance from mounted on printed-circuit board;
junction to ambient
minimum footprint
thermal resistance from see
Figure 4
junction to mounting
base
1
03ne76
Z
th(j-mb)
(K/W)
10-1
δ
= 0.5
0.2
0.1
0.05
0.02
Single Shot
P
δ
=
tp
T
10-2
tp
T
t
10-3
10-6
10-5
10-4
10-3
10-2
10-1
1
tp (s)
10
Fig 4.
Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK9107-55ATE_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 16 February 2009
5 of 15
京公网安备 11010802033920号
EEWORLD
