MA-241-060-235-A5500 datasheet, PDF

MA-241-060-235-A5500: DescriptionBoard Connector, 60 Contact(s), 2 Row(s), Female, Straight, Solder Terminal, Receptacle,; CategoryThe connector The connector; File Size2MB，6 Pages; ManufacturerAirBorn

Download Datasheet Parametric View All

MA-241-060-235-A5500 Overview

Board Connector, 60 Contact(s), 2 Row(s), Female, Straight, Solder Terminal, Receptacle,

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	AirBorn
Reach Compliance Code	compliant
Other features	LATCHED
Body/casing type	RECEPTACLE
Connector type	BOARD CONNECTOR
Contact to complete cooperation	GOLD (50)
Contact completed and terminated	TIN LEAD
Contact point gender	FEMALE
Contact material	NOT SPECIFIED
DIN compliance	NO
Filter function	NO
IEC compliance	NO
JESD-609 code	e0
MIL compliance	NO
Manufacturer's serial number	MA
Plug information	MULTIPLE MATING PARTS AVAILABLE
Mixed contacts	NO
Installation method	STRAIGHT
Installation type	BOARD
Number of rows loaded	2
Options	GENERAL PURPOSE
Terminal pitch	1.27 mm
Termination type	SOLDER
Total number of contacts	60

Cannot copy and paste code in CubeSuite+: I have been using CubeSuite+ for several years. One of the most common problems I have encountered is that I can't copy the code suddenly. It's so frustrating. Sometimes I can just reopen the project ...; 忘归尘 Renesas Electronics MCUs

How to choose electromagnetic relay: [align=left][font="][size=4][color=#0000ff]1. Select the rated working voltage and rated working current [/color][/size][/font][/align][align=left][color=rgb(34, 34, 34)][font="]When selecting an elec...; tiankai001 Integrated technical exchanges

Aspirational motto written on the wall of Harvard Library (reprinted): 1. If you take a nap now, you will dream; but if you study now, you will realize your dream. 2. The today I waste is the tomorrow that the people who died yesterday prayed for. 3. When you feel it is ...; 粉红小猪 MCU

fpga design counter delay: I designed a 4-bit counter using FPGA. When simulating, the output pins q0, q1, q2, and q3 cannot change at the same time. This causes a transient state between one state and the next, such as a trans...; happyxiaoyaozi FPGA/CPLD

EDA experiment and practice sine_test: module sine_test(clock,key,select,data,seg,dig); input clock; //system clock (48MHz) input[3:0] key; //key input (KEY1~KEY5) output select; //data enable output[11:0]data; //data to be sent output[7:0...; 白丁 FPGA/CPLD

Have you received the discount code from TI?: Celebrating the launch of 50 new products, three wireless development boards are 80% off. Valid until August 31st...; wzjhuohua TI Technology Forum

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components