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PMR400UN,115

Description
PMR400UN - N-channel TrenchMOS ultra low level FET SC-75 3-Pin
CategoryDiscrete semiconductor    The transistor   
File Size478KB,14 Pages
ManufacturerNexperia
Websitehttps://www.nexperia.com
Download Datasheet Parametric View All

PMR400UN,115 Overview

PMR400UN - N-channel TrenchMOS ultra low level FET SC-75 3-Pin

PMR400UN,115 Parametric

Parameter NameAttribute value
Brand NameNexperia
Parts packaging codeSC-75
package instructionSMALL OUTLINE, R-PDSO-G3
Contacts3
Manufacturer packaging codeSOT416
ECCN codeEAR99
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage30 V
Maximum drain current (Abs) (ID)0.8 A
Maximum drain current (ID)0.8 A
Maximum drain-source on-resistance0.48 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-30 codeR-PDSO-G3
JESD-609 codee3
Humidity sensitivity level1
Number of components1
Number of terminals3
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)0.53 W
Certification statusNot Qualified
surface mountYES
Terminal surfaceTin (Sn)
Terminal formGULL WING
Terminal locationDUAL
Maximum time at peak reflow temperature40
transistor applicationsSWITCHING
Transistor component materialsSILICON

PMR400UN,115 Preview

Important notice
Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
tradename
Nexperia.
Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
application markets
In data sheets and application notes which still contain NXP or Philips Semiconductors references, use
the references to Nexperia, as shown below.
Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/,
use
http://www.nexperia.com
Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use
salesaddresses@nexperia.com
(email)
Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
the version, as shown below:
- © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
reserved
Should be replaced with:
-
© Nexperia B.V. (year). All rights reserved.
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail
or telephone (details via
salesaddresses@nexperia.com).
Thank you for your cooperation and
understanding,
Kind regards,
Team Nexperia
SO
T4
16
PMR400UN
N-channel TrenchMOS ultra low level FET
Rev. 2 — 2 February 2012
Product data sheet
1. Product profile
1.1 General description
N-channel enhancement mode Field-Effect Transistor (FET) in ultra small
Surface-Mounted Device (SMD) plastic package using TrenchMOS technology.
1.2 Features and benefits
Low threshold voltage
Surface mounted package
Low on-state resistance
Footprint 63% smaller than SOT23
1.3 Applications
Driver circuits
Switching in portable appliances
1.4 Quick reference data
Table 1.
Symbol
V
DS
I
D
V
GS
R
DSon
Quick reference data
Parameter
drain-source voltage
drain current
gate-source voltage
drain-source on-state
resistance
V
GS
= 4.5 V; I
D
= 0.2 A; T
j
= 25 °C
Conditions
T
j
25 °C; T
j
150 °C
T
sp
= 25 °C; V
GS
= 4.5 V
Min
-
-
-8
-
Typ
-
-
-
400
Max
30
0.8
8
480
Unit
V
A
V
mΩ
Static characteristics
2. Pinning information
Table 2.
Pin
1
2
3
Pinning information
Symbol Description
G
S
D
gate
source
drain
1
2
S
017aaa253
Simplified outline
3
Graphic symbol
D
G
SOT416 (SC-75)
NXP Semiconductors
PMR400UN
N-channel TrenchMOS ultra low level FET
3. Ordering information
Table 3.
Ordering information
Package
Name
PMR400UN
SC-75
Description
plastic surface-mounted package; 3 leads
Version
SOT416
Type number
4. Marking
Table 4.
Marking codes
Marking code
R7
Type number
PMR400UN
5. Limiting values
Table 5.
Symbol
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
T
j
I
S
I
SM
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
T
sp
= 25 °C
T
sp
= 25 °C; pulsed; t
p
10 µs
T
sp
= 25 °C; V
GS
= 4.5 V
T
sp
= 100 °C; V
GS
= 4.5 V
T
sp
= 25 °C; pulsed; t
p
10 µs
T
sp
= 25 °C
Conditions
T
j
25 °C; T
j
150 °C
T
j
25 °C; T
j
150 °C; R
GS
= 20 kΩ
Min
-
-
-8
-
-
-
-
-55
-55
-
-
Max
30
30
8
0.8
0.51
1.61
0.53
150
150
0.44
0.88
Unit
V
V
V
A
A
A
W
°C
°C
A
A
In accordance with the Absolute Maximum Rating System (IEC 60134).
Source-drain diode
PMR400UN
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 2 February 2012
2 of 13
NXP Semiconductors
PMR400UN
N-channel TrenchMOS ultra low level FET
120
I
der
(%)
80
03aa25
120
P
der
(%)
80
03aa17
40
40
0
0
50
100
150
T
sp
(°C)
200
0
0
50
100
150
T
sp
(°C)
200
Fig 1.
Normalized continuous drain current as a
function of solder point temperature
Fig 2.
Normalized total power dissipation as a
function of solder point temperature
10
03ao06
ID
(A)
Limit RDSon = VDS / ID
tp = 10
μ
s
1
100
μ
s
DC
10-1
1 ms
10 ms
100 ms
10-2
10-1
1
10
VDS (V)
102
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
PMR400UN
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 2 February 2012
3 of 13
NXP Semiconductors
PMR400UN
N-channel TrenchMOS ultra low level FET
6. Thermal characteristics
Table 6.
Symbol
R
th(j-sp)
Thermal characteristics
Parameter
thermal resistance
from junction to solder
point
Conditions
Min
-
Typ
-
Max
235
Unit
K/W
103
03an29
Zth(j-sp)
(K/W)
δ
= 0.5
102
0.2
0.1
0.05
0.02
single pulse
10
10-4
10-3
10-2
10-1
1
tp (s)
10
tp
T
t
P
δ
=
tp
T
Fig 4.
Transient thermal impedance from junction to solder point as a function of pulse duration
PMR400UN
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 2 February 2012
4 of 13
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