UM10389
36 W TLD application with UBA2014
Rev. 01 — 2 October 2009
User manual
Document information
Info
Keywords
Abstract
Content
UBA2014, Half bridge driver
The UBA2014 integrated half bridge driver IC has been designed for
driving electronically ballasted fluorescent lamps.The IC provides the drive
function for two discrete power MOSFETs.
NXP Semiconductors
UM10389
36 W TLD application with UBA2014
Revision history
Rev
01
Date
20091002
Description
First issue, replaces application note AN10181
Contact information
For more information, please visit:
http://www.nxp.com
For sales office addresses, please send an email to:
salesaddresses@nxp.com
UM10389_1
© NXP B.V. 2009. All rights reserved.
User manual
Rev. 01 — 2 October 2009
2 of 16
NXP Semiconductors
UM10389
36 W TLD application with UBA2014
1. Introduction
The UBA2014 integrated half bridge driver IC has been designed for driving electronically
ballasted fluorescent lamps. The IC provides the drive function for two discrete power
MOSFETs. Besides the drive function the IC also includes a level-shift circuit, an
oscillator, a lamp voltage monitor, a current control function a timer function, and
protections.
This user manual gives a description of a typical integrated 36 W TLD application. The
voltage fed half bridge is supplied by a constant 400 V (DC) supply (either an external or a
PFC supply). According IEC61000-3-2 (limits for harmonic current emission), power factor
correction for loads over 25 W is required, see
Figure 1).
Fig 1.
Input circuitry using a PFC
Fig 2.
Normal input circuitry
If complying with the IEC61000-3-2 standard is not required, a normal input circuit like in
Figure 2,
can be used. Keep in mind that the lamp power is not constant over a big input
voltage range (e.g. 190 V (AC) to 264 V (AC)). The voltage fed half bridge topology allows
for operating easily in Zero Voltage Switching (ZVS) series resonant mode, thus reducing
the transistor switching losses and the electromagnetic interference. During the preheat
time the UBA2014 controls the current which flows in the filament of the lamp. The
preheat timer and control system determine the optimal preheat time and preheat current
to make sure the lamp has a long life and an efficient ignition. After the preheat time the
lamp must be ignited by reducing the switching frequency, in this way increasing the
voltage across it. The IC controls the maximum ignition voltage and the ignition timer
determines the maximum ignition time. During this phase the capacitive mode protection
ensures a safe operation of the power MOSFETs. In the burn phase the lamp current is
controlled by the average current system. In this phase the lamp can be dimmed to a low
level by frequency dimming.
The UBA2014 has protections for lamp ageing, lamp failures, and lamp removal. The
power-down function can safely switch off the power inverter.
UM10389_1
© NXP B.V. 2009. All rights reserved.
User manual
Rev. 01 — 2 October 2009
3 of 16
NXP Semiconductors
UM10389
36 W TLD application with UBA2014
2. Features
•
Integrated half bridge power IC for fluorescent applications
–
Integrated high side/low side, including bootstrap circuitry
–
Based on the BCD 650 V power logic technology
–
Accurate oscillator and timer
–
Adjustable frequency range (with fixed f
max
/f
min
ratio)
–
Adaptive non-overlap time control
–
Capacitive mode protection
–
Adjustable preheat current and time control
–
Single ignition attempt
–
Power-down function
•
•
•
•
•
•
Soft start by frequency sweep down from start frequency
Adjustable ignition voltage control
Lamp current control
Down to 10 % dimming
Protection against lamp failures or lamp removal
SO16, DIP16 package
3. General description
3.1 Printed-circuit board
Remark:
this controller had no official number.
Fig 3.
The printed-circuit board of the UBA2014 application
UM10389_1
© NXP B.V. 2009. All rights reserved.
User manual
Rev. 01 — 2 October 2009
4 of 16
NXP Semiconductors
UM10389
36 W TLD application with UBA2014
3.2 Block diagram
Fig 4.
UBA2014 block diagram
Figure 4
shows the block schematic diagram of the UBA2014. The block state logic forms
the heart of the controller and controls all other internal functions. Initial start-up is
achieved by means of charging an external capacitor (C15 in
Figure 5)
connected to pin 7.
The state logic will be reset and both outputs GL and GH are set to low (reset state).
Reaching a voltage of 13.6 V, the controller enables the blocks voltage controlled
oscillator (VCO), the Adaptive Non-overlap Time (ANT), the PReheat Timer (PRT), the
Preheat current sensor (PCS), and the Lamp Voltage Sensor (LVS).
The VCO generates a sawtooth shaped voltage between 2.5 V and 0 V. The frequency is
determined by the value of the capacitor connected to pin 3 (C14), the resistor connected
to pin 4 (R12), and the voltage at pin 2. The minimum frequency is determined by R12 and
C14, see also
Section 4.
The maximum frequency, at which the circuit starts oscillating, is
2.5 times the minimum frequency. The comparator in the VCO changes the sawtooth into
a block voltage, which drives the driver logic. The driver logic drives the HS-driver and the
LS-driver, but with a frequency which is half the VCO frequency. The first switching cycle
the drive signal for the LS-driver is made extra long to enable the bootstrap to charge the
externally connected bootstrap capacitor (between pins 9 and 11). The gates of the power
MOSFETs are connected to GH and GL.
The ANT ensures that both power MOSFETs have the same on-time which is
independent of the frequency. The voltage at pin 12 is measured across externally
connected resistor R16 (see
Figure 5).
The PRT is included to determine the preheat time and ignition time. The preheat time is
defined by the capacitor connected to pin 1 (C12) and resistor R12 connected to pin 4. It
consists of seven pulses at C12. The maximum ignition time is one pulse at C12. The
circuit is operational during start-up and in case of a fault condition, for example when no
lamps are connected.
UM10389_1
© NXP B.V. 2009. All rights reserved.
User manual
Rev. 01 — 2 October 2009
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