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Datasheet> All Categories > logic> logic> IDT74FCT574DTP
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IDT74FCT574DTP

Description
FCT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20, PLASTIC, DIP-20
Categorylogic    logic   
File Size790KB，8 Pages
ManufacturerRochester Electronics
Websitehttps://www.rocelec.com/
Download Datasheet Parametric View All

IDT74FCT574DTP Overview

FCT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20, PLASTIC, DIP-20

IDT74FCT574DTP Parametric

Parameter NameAttribute value
MakerRochester Electronics
Parts packaging codeDIP
package instructionDIP,
Contacts20
Reach Compliance Codeunknown
Other featuresBROADSIDE VERSION OF 374
seriesFCT
JESD-30 codeR-PDIP-T20
JESD-609 codee0
length26.162 mm
Logic integrated circuit typeBUS DRIVER
Number of digits8
Number of functions1
Number of ports2
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
propagation delay (tpd)4.2 ns
Certification statusCOMMERCIAL
Maximum seat height4.191 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN LEAD
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
width7.62 mm

IDT74FCT574DTP Preview

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IDT74FCT574T/AT/CT/DT
FAST CMOS OCTAL D REGISTER (3-STATE)
COMMERCIAL TEMPERATURE RANGE
FAST CMOS OCTAL D
REGISTERS (3-STATE)
IDT74FCT574T/AT/CT/DT
FEATURES:
−
−
−
−
−
−
−
−
−
Low input and output leakage
≤1µ
A (max.)
Extended commercial range of –40°C to +85°C
CMOS power levels
True TTL input and output compatibility
•
V
OH
= 3.3V (typ.)
•
V
OL
= 0.3V (typ.)
Meets or exceeds JEDEC standard 18 specifications
Product available in Radiation Tolerant and Radiation Enhanced
versions
Available in PDIP, SOIC, SSOP, QSOP, and TSSOP packages
Std., A, C and D speed grades
High drive outputs (-15mA I
OH
, 48mA I
OL
)
DESCRIPTION:
The FCT574T is an 8-bit register built using an advanced dual metal
CMOS technology. These registers consist of eight D-type flip-flops with a
buffered common clock and buffered 3-state output control. When the output
enable (OE) input is low, the eight outputs are enabled. When the
OE
input
is high, the outputs are in the high-impedance state.
Input data meeting the set-up and hold time requirements of the D inputs
is transferred to the Q outputs on the low-to-high transition of the clock input.
FUNCTIONAL BLOCK DIAGRAM
D
0
CP
CP
D
Q
CP
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
OE
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
COMMERCIAL TEMPERATURE RANGE
1
c
1999 Integrated Device Technology, Inc.
SEPTEMBER 1999
DSC-5494/-
IDT74FCT574T/AT/CT/DT
FAST CMOS OCTAL D REGISTER (3-STATE)
COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATION
OE
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
GND
1
2
3
4
5
6
7
8
9
10
P20-1
D20-1
SO20-2
SO20-7
SO20-8
SO20-9
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM(2)
Rating
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Max.
–0.5 to +7
–0.5 to V
CC
+0.5
–65 to +150
–65 to +120
Unit
V
V
°C
mA
8T-link
20
19
18
17
16
15
14
13
12
11
V
CC
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
CP
V
TERM(3)
T
STG
I
OUT
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
No
terminal voltage may exceed Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Outputs and I/O terminals only.
CAPACITANCE
(T
A
= +25
O
C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
8T-link
NOTE:
1. This parameter is measured at characterization but not tested.
PDIP/ SOIC/ SSOP/ QSOP/ TSSOP
TOP VIEW
PIN DESCRIPTION
Pin Names
D
N
CP
Q
N
Q
N
OE
Description
D flip-flop data inputs
Clock Pulse for the register. Enters data on LOW-to-
HIGH transition.
3-state outputs (TRUE)
3-state outputs (INVERTED)
Active LOW 3-state Output Enable input
(1)
Outputs
D
N
X
X
L
H
L
H
Q
N
Z
Z
L
H
Z
Z
Internal
Q
N
NC
NC
H
L
H
L
FUNCTION TABLE
Inputs
Function
HI-Z
LOAD
REGISTER
OE
H
H
L
L
H
H
CP
L
H
↑
↑
↑
↑
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
NC = No Change
↑
= LOW-to-HIGH transition
2
IDT74FCT574T/AT/CT/DT
FAST CMOS OCTAL D REGISTER (3-STATE)
COMMERCIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: T
A
= –40°C to +85°C, V
CC
= 5.0V ± 5%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
I
I
V
IK
V
H
I
CC
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
(4)
Input LOW Current
(4)
High Impedance Output Current
(3-State Output pins)
(4)
Input HIGH Current
(4)
Clamp Diode Voltage
Input Hysteresis
Quiescent Power Supply Current
V
CC
= Max., V
I
= V
CC
(Max.)
V
CC
= Min., I
IN
= –18mA
—
V
CC
= Max., V
IN
= GND or V
CC
V
CC
= Max.
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
I
= 2.7V
V
I
= 0.5V
V
O
= 2.7V
V
O
= 0.5V
Min.
2
—
—
—
—
—
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
—
–0.7
200
0.01
Max.
—
0.8
±1
±1
±1
±1
±1
–1.2
—
1
µA
V
mV
mA
8T-link
Unit
V
V
µA
OUTPUT DRIVE CHARACTERISTICS
Symbol
I
ODL
I
ODH
V
OH
V
OL
Parameter
Output LOW Current
Output HIGH Current
Output HIGH Voltage
Output LOW Voltage
Test Conditions
(1)
V
CC
= 5V, V
IN
= V
IH
or V
IL
, V
OUT
= 1.5V
(3)
V
CC
= 5V, V
IN
= V
IH
or V
IL
, V
OUT
= 1.5V
(3)
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OH
= –15mA
I
OH
= 12mA
Min.
16
-16
2.4
—
Typ.
(2)
48
-48
3.3
0.3
Max.
—
—
—
0.5
Unit
mA
mA
V
V
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is ±5µ A at T
A
= –55°C.
3
IDT74FCT574T/AT/CT/DT
FAST CMOS OCTAL D REGISTER (3-STATE)
COMMERCIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
OE
= GND
One Input Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
f
CP
= 10MHz
50% Duty Cycle
OE
= GND
fi = 5MHz
50% Duty Cycle
One Bit Toggling
V
CC
= Max.
Outputs Open
f
CP
= 10MHz
50% Duty Cycle
OE
= GND
Eight Bits Toggling
fi = 2.5MHz
50% Duty Cycle
Min.
—
—
Typ.
(2)
0.5
0.15
Max.
2
0.25
Unit
mA
mA/
MHz
V
IN
= V
CC
V
IN
= GND
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
—
1.5
3.5
mA
V
IN
= 3.4
V
IN
= GND
—
2
5.5
V
IN
= V
CC
V
IN
= GND
—
3.8
7.3
(5)
V
IN
= 3.4
V
IN
= GND
—
6
16.3
(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP/
2 + f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
4
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