DAC-15D8A-8. oC:5TA:5+75°C for DAC-14D8A, nless otherwise noted. All digital inputs at logic high level.
D
u
DAC-1508A/1408A
OBS
Relative Accuracy lerror relative to
Full-Scale 101
DAC-1508A-B, DAC-1408A-8
DAC-1408A-7
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
'E,
-
-
-
DAC-1408A-6
SettlingTime to within 1/2 LSB
lincludes tpLHI
Propagation Delay Time
ts
tPLH' tPHL
Output Fu1l-'Scale urrentDrift
C
High Level, Logic "1"
Low Level, Logic "1"
TClo
V1H
VIL
IIH
Digital Input Logic Levels (MSBI
Digitalln'put
Current (MSBI
IlL
'15
lOR
ReferenceInput BiasCurrent IPin 151
Output Current Range
Output Current
Output Current
'0
10Imini
OLE
TE
TA= +25°C
TA=+25°C,
INote
11
-
-
-
:to.19
:to.39
:to,78
%IFS
-
-
-
250,
ns
ns
30
100
:t20
ppm/OC
-
-
-
2
-
0.8
Vdc'
mA
/loA
High Level, VIH= 5.0V
Low Level, V1L= 0.8V
0
-0.4
-1
0.04
-0.8
-3
-
VEE= -5V
VEE -15V
=
0
0
2.0
2.0
2.1
4.2
2.1
mA
mA
/loA
VREF= 2.000V, R14 = 1000n
1,9
1.99
All
bits low
IREF= 1mA
-
-0,6
-5
-
0
4
+0.5
Output VoltageCompliance
IEr$0,19%atTA=+25°CI
ReferenceCurrent SlewRate
Output Current Power Supply
Sensitivity
Power Supply Current
Vo
SRIREF
PSSlo-
Ice
lEE
VeeR
VEER
VEE -5V
=
VEE -10V
=
-
4
0.5
+0.5
Vdc
mA//Io~
-
-
All bits low
2.7
/loAN
-
-
+4.5
-4.5
,-
+9
-7.5
+5
-15
+14
-13
+5.5
-16.5
mA
Power Supply Voltage
TA = +25°C
All bits low
VEE= -5Vdc
VEE= -15Vdc
Vdc
-
-
-
82
135
-
-
-
Power Dissipation
157
70
132
Pd
265
All bits high
VEE -5Vdc
=
VEE -15Vdc
=
mW
---
NOTE:
1, Guaranteed by design.
--:;
11-116
8/87, Rev. Ai
--
-~~
"""'i"~
..
---
"ICE CHARACTERISTICS
!PMI)
DAC-150aA/140aA
a-BIT MULTIPLYING D/A CONVERTERS
1. N.C.
2. GROUND
3. VEE
4.10
5. A1 (MSB)
6. A2
7. A3
a. A4
9.
10.
11.
12.
13.
14.
15.
16.
A5
A6
A7
Aa (LSB)
VCC
VREF(+)
VREF(-)
COMP
For
additional
DICE ordering information, refer
to 1988 Data Book, Section
2.
OBS
-
PARAMETER
DIE SIZE 0.087
x
0.063 inch,
5481 sq. mils
(2.21
x
1.60 mm, 3.54 sq. mm)
C/)
p:::
WAFER
TEST LIMITS at V+ = 5V,V- = 15V,IREF 2mA, TA= 25°
C, unless otherwise
=
SYMBOL
CONDITIONS
noted.
Resolution
Monotonicity
Nonlinearity
output Voltage Compliance
Vo
IFS
Izs
<1/2 LSB
Full-Scale Current
Zero-Scale Current
output Current Range
Logic "0" Input Level
Logic "1" Input Level
Logic Input Current
Logic "0"
Logic "1"
Reference Bias Current
Output Current Power
Supply
sensitivity
PowerSupply Current
(All Bits Low)
PowerSupply Voltage Range
Power Dissipation
(All Bits Low)
VREF=2.000V.
R14' R15= 1.000kO
(All Bits Low)
V-
lOR
VIL
VIH
OLE
TE
8
BitsMIN
BitsMIN
DAC-1408A-G
LIMIT
8
UNITS
-
>
Z
0
0
0
U
:to.19
+0.5
-0.6
-5
%FS MAX
Full-ScaleCurrentChange,
'REF= 1mA
V-=-5V
V- = -10V
-
VMAX
VMIN
-
VMIN
<
Z
I
2, :to.1
mA MAX
p.AMAX
<
0
f-4
I
4
=
-5V
V- = -15V
2.1
4.2
0.8
mAMAX
-
VMAX
-
VMIN
-
2
0
0
-
-
II
IlL
IIH
115
Low Level, VIL
=
-0.8V
High Level, VIH=5V
:t10
:t10
p.AMAX
-3
2.7
+14
-13
+5. :to.5
-16.5, -4.5
V- = 5V
V- = -15V
135
265
p.AMAX
p.AJVMAX
mA MAX
PSSlo-
1+
1-
VCCR
VEER
V MAXIMIN
Pd
mW MAX
NOTE:
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not
guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
TYPICAL ELECTRICAL CHARACTERISTICS
IREF
=
at V+ = +5V. V- = -15V, TA = 25° C, VLC and lOUT connected
to ground. and
2mA, unless otherwise noted. Output characteristics refer to lOUTonly.
SYMBOL
dl/dt
tPLH' tpHL
PARAMETER
Reference Input Slew Rate
Propagation Delay
Settling
Time
CONDITIONS
DAC-1408G
TYPICAL
4
30
250
UNITS
mAJp.S
os
ns
Any Bit
To :t1/2
LSB. All
Bits Switched
ts
ON or OFF
11-117
8/87, Rev. A1
--
-~~
'IPMI)
DAC-1508A/1408A 8-BIT MULTIPLYINGD/A CONVERTERS
APPLICATIONS
RELATIVE
ACCURACYTEST CIRCUIT
MSB
AI
A2
A3
A4
AS
A6
A7
A6
61d1
12-8IT
D-TOA-
CONVERTER
ItO.OI%
ERROR MAX)
0
'
6Okfl
OBS
B-8IT
COUNTER
VREF'" 2V
OR
1%)
VCC
R14
950fJ
OLE
TE
MSB
5
6
7
-:
14
13
S
9
DAC-I508A/
DAC-I408A
4
10
11
12
15 16 3 2
C
IkfJ
-
USE WITH NEGATIVE VREF
'tC
13
VEE-
-
USE WITH POSITIVE VREF
R14"R15
R14" R15
A4
:3
A3
A6
A5 0--
101
A6
A7
7
15
S DAC-I508A/
DAC-I408A
9
14
NY--
R15
5
R14
14
15
R15
Lr
-:
C
IiREFH
AI
A2
A3
-
6
7
VREF(+)
..JL
RL
M
9
='-
OAC-I408A
-
A5 10
4
-
...J....
RL
3
SEE
TEXT
FOR
VALUES
OFC
A6 11
A7 0--'-'
12
AS 0-- I
16
---.J
3
...LC
T
SEE
TEXT
FOR
VALUES
OFC
VEE
- -
VEE
-: -:
:-;
11-118
8/87, ReV. Ai
.~
r
I
I
i
-
IPMI)
DAC-1508A11408A
8-BIT MULTIPLYING DIA CONVERTERS
TRANSIENT RESPONSE AND SETTLING
TIME TEST CIRCUIT
O.IF
r
'( Vee
0 +2.0Vdc
,
14
15
101<
10k
1k
OBS
12
'" I
51
grR
10
11
4
16
I
EO
t-f-l.
'..
Ir'
EO FOR SETTLING TIME MEASUREMENT
(ALL BITS SWITCHED LOW TO HIGH)
USE
WITH CURRENT -TO-VOLTAGE CONVERTING OP AMP
VCC
13
MS8
AI
A2
.
5
VREF' 2.0Vdc
R14 . R15 '" 1.11kn
RO . 5.01<11-
---.
14
15
R15
A3
A4
AS
8
""1DAC-15O8A1
91 DAC-1408A
OLE
TE
VREF
Pin 14 regardless of the setup method or reference voltage
polarity. Connections for a positive voltage are shown on the
preceding page. The reference voltage source supplies the
full current 114.For bipolar reference signals, as in the
multiplying mode, R15 can be tied to a negative voltage
corresponding to the minimum input level. It is possible to
eliminate R15 with only a small sacrifice in accuracy and
temperature drift.
The compensation capacitor value must be increased with
increases in R14 to maintain proper phase margin; for R14
values of 1.0, 2.5 and 5.0kn, minimum capacitor values are 15.
37, and 75pF. The capacitor may be tied to either VEEor
ground, but using VEEincreases negative supply rejection.
A negative reference voltage may be used if R14 is grounded
and the reference voltage is applied to R15 as shown. A high
input impedance is the main advantage of this method.
Compensation involves a capacitor to VEEon Pin 16, using
the values of the previous paragraph. The negative reference
voltage must be at least 4.0V above the VEE
supply. Bipolar
input signals may be handled by connecting R14to a positive
reference voltage equal to the peak positive input level at
Pin 15.
When a DC reference voltage is used. capacitive bypass to
ground is recommended as a reference voltage. If a well
regulated 5.0Vsupply, which drives logic is to be used as the
reference, R14 should be decoupled by connecting it to
+ 5.0Vthrough another resistor and bypassing the junction of
the two resistors with 0.1~F to ground. For reference voltages
greater than 5.0Y. a clamp diode is recommended between
Pin 14 and ground.
If Pin 14 is driven by a high impedance such as a transistor
current source, none of the above compensation methods
apply and the amplifier must be heavily compensated,
decreasing the overall bandwidth.
r.rJ
~
~
~
~
~
0
U
{j
0
~
~
-<
I
0
f-I
I
~
-
{j
-
0
RO
A7
A8
LSB
6
Vo
OUTPUT
VOLTAGERANGE
The voltage on Pin 4 is restricted to a range of -0.6V to +0.5V
when VEE
=
-5V due to the current switching methods
employed in the DAC-1508A-8.
The negative output voltage compliance of the DAC-1508A-8
is extended to -5.0V where the negative supply voltage is
more negative than -10V. Using a full-scale current of
1.992mAand load resistor of 2.5kn between Pin 4 and ground
will yield a voltage output of 256 levels between 0 and
-4.980V. The value of the load resistor determines the
switching time due to increased voltage swing. Values of RL
up to 500n do not significantly affect performance but a
2.5kn load increases "worst case" settling time to 1.2~s
(when all bits are switched on). Refer to the subsequent text
section of Settling Time for more details on output loading.
OUTPUT CURRENT RANGE
The output current maximum rating of 4.2mA may be used
only for negative supply voltages more negative than -7.0V,
due to the increased voltage drop across the resistors in the
reference current amplifier.
II
VEE
THEORETICALVo
~
~
Vo
.~
(Rol
[¥+¥+~+~+tt+tI+Mi+~]
ADJUST
VREF R15 OR RO SO
THAT
Vo
WITH ALL DIGITAL
INPUTS AT HIGH LEVEL IS EQUAL TO 9.961 VOLTS.
VO'
.
10V[~~}
~ (5kI[t+f+i+;i+i+i4+1~+~]
9.961V
GENERAL
INFORMATION
AND APPLICATION NOTES
REFERENCEMPLIFIERDRIVEAND COMPENSATION
A
The reference amplifier provides a voltage at Pin 14 for
converting the reference voltage to a current. and a turn-
around
circuit or current mirror for feeding the ladder. The
reference amplifier input current, 114,must always flow into
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