|
SN74LVC74APWLE |
5962-9761601VCA |
5962-9761601V2A |
SN74LVC74ADBLE |
| Description |
Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset 14-TSSOP -40 to 125 |
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET 14-CDIP -55 to 125 |
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET 20-LCCC -55 to 125 |
Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset 14-SSOP -40 to 125 |
| Brand Name |
Texas Instruments |
Texas Instruments |
Texas Instruments |
Texas Instruments |
| Is it lead-free? |
Contains lead |
Contains lead |
Contains lead |
Contains lead |
| Is it Rohs certified? |
incompatible |
incompatible |
incompatible |
incompatible |
| Parts packaging code |
TSSOP |
DIP |
QLCC |
SSOP |
| package instruction |
TSSOP, TSSOP14,.25 |
DIP, DIP14,.3 |
QCCN, |
SSOP, SSOP14,.3 |
| Contacts |
14 |
14 |
20 |
14 |
| Reach Compliance Code |
not_compliant |
_compli |
not_compliant |
not_compliant |
| series |
LVC/LCX/Z |
LVC/LCX/Z |
LVC/LCX/Z |
LVC/LCX/Z |
| JESD-30 code |
R-PDSO-G14 |
R-GDIP-T14 |
S-CQCC-N20 |
R-PDSO-G14 |
| length |
5 mm |
19.56 mm |
8.89 mm |
6.2 mm |
| Logic integrated circuit type |
D FLIP-FLOP |
D FLIP-FLOP |
D FLIP-FLOP |
D FLIP-FLOP |
| Number of digits |
1 |
1 |
1 |
1 |
| Number of functions |
2 |
2 |
2 |
2 |
| Number of terminals |
14 |
14 |
20 |
14 |
| Maximum operating temperature |
125 °C |
125 °C |
125 °C |
125 °C |
| Minimum operating temperature |
-40 °C |
-55 °C |
-55 °C |
-40 °C |
| Output polarity |
COMPLEMENTARY |
COMPLEMENTARY |
COMPLEMENTARY |
COMPLEMENTARY |
| Package body material |
PLASTIC/EPOXY |
CERAMIC, GLASS-SEALED |
CERAMIC, METAL-SEALED COFIRED |
PLASTIC/EPOXY |
| encapsulated code |
TSSOP |
DIP |
QCCN |
SSOP |
| Package shape |
RECTANGULAR |
RECTANGULAR |
SQUARE |
RECTANGULAR |
| Package form |
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH |
IN-LINE |
CHIP CARRIER |
SMALL OUTLINE, SHRINK PITCH |
| Peak Reflow Temperature (Celsius) |
NOT SPECIFIED |
NOT SPECIFIED |
NOT SPECIFIED |
NOT SPECIFIED |
| propagation delay (tpd) |
7.1 ns |
6 ns |
6 ns |
7.1 ns |
| Certification status |
Not Qualified |
Not Qualified |
Not Qualified |
Not Qualified |
| Maximum seat height |
1.2 mm |
5.08 mm |
2.03 mm |
2 mm |
| Maximum supply voltage (Vsup) |
3.6 V |
3.6 V |
3.6 V |
3.6 V |
| Minimum supply voltage (Vsup) |
1.65 V |
2 V |
2 V |
1.65 V |
| Nominal supply voltage (Vsup) |
1.8 V |
2.7 V |
2.7 V |
1.8 V |
| surface mount |
YES |
NO |
YES |
YES |
| technology |
CMOS |
CMOS |
CMOS |
CMOS |
| Temperature level |
AUTOMOTIVE |
MILITARY |
MILITARY |
AUTOMOTIVE |
| Terminal form |
GULL WING |
THROUGH-HOLE |
NO LEAD |
GULL WING |
| Terminal pitch |
0.65 mm |
2.54 mm |
1.27 mm |
0.65 mm |
| Terminal location |
DUAL |
DUAL |
QUAD |
DUAL |
| Maximum time at peak reflow temperature |
NOT SPECIFIED |
NOT SPECIFIED |
NOT SPECIFIED |
NOT SPECIFIED |
| Trigger type |
POSITIVE EDGE |
POSITIVE EDGE |
POSITIVE EDGE |
POSITIVE EDGE |
| width |
4.4 mm |
7.62 mm |
8.89 mm |
5.3 mm |
| minfmax |
150 MHz |
100 MHz |
100 MHz |
150 MHz |
| Load capacitance (CL) |
50 pF |
50 pF |
- |
50 pF |
| MaximumI(ol) |
0.024 A |
0.024 A |
- |
0.024 A |
| Encapsulate equivalent code |
TSSOP14,.25 |
DIP14,.3 |
- |
SSOP14,.3 |
| power supply |
3.3 V |
3.3 V |
- |
3.3 V |