530PA26M0000BGR datasheet, PDF

Datasheet> All Categories > Passive components> oscillator> 530PA26M0000BGR

530PA26M0000BGR: DescriptionCMOS Output Clock Oscillator, 26MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size268KB，15 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

530PA26M0000BGR Overview

CMOS Output Clock Oscillator, 26MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530PA26M0000BGR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Reach Compliance Code	unknown
Other features	TAPE AND REEL
Frequency Adjustment - Mechanical	NO
frequency stability	50%
JESD-609 code	e4
Manufacturer's serial number	530
Installation features	SURFACE MOUNT
Nominal operating frequency	26 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	CMOS
physical size	7.0mm x 5.0mm x 1.85mm
Maximum supply voltage	3.63 V
Minimum supply voltage	2.97 V
Nominal supply voltage	3.3 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.0 7/06

Si530/531

Recommended Resources

Make a dream lamp with CD4069

Asynchronous motor energy consumption braking control circuit

Positive output mono circuit diagram

Bipolar regulated power supply circuit

Energy-saving multipurpose electronic rectifier circuit

Shift Register

What are the wireless transmission advantages of indoor wireless communication positioning technology AOD/AOA?: Wireless data transmission indoor positioning technology for IoT: AOA and AOD In order to solve the problem that satellite positioning cannot be used in indoor environments, there are many different i...; 成都亿佰特 RF/Wirelessly

How to test the indoor air quality at low cost?: How to test the air quality in the house at a low cost? For example, the formaldehyde content. I always suspect that the house has too much odor....; wangfuchong Talking

Tsu/Tco meaning explanation: The meaning of Tsu/Tco in the Quartus II report: [list=1][*] The Tsu/Tco in the chip refers to the Tco of the previous stage trigger and the Tsu of the next stage trigger, which are generally in the o...; eeleader FPGA/CPLD

Give me a cracked altium designer download address! ～!! ! ～: Give me an altium designer; I downloaded it without cracking it, and I couldn't crack it after trying for a long time! ～! ～! ～...; sw85174700 51mcu

Master these skills to easily operate DC-DC circuits: DC-DC can always be seen in electronic products. Today, I will share some relevant knowledge points about DC-DC. Concept and characteristicsDC-DC refers to Direct Current. It is a device that converts...; 可乐zzZ MCU

Antenna Design Solutions for Next Generation Mobile Devices: Rapid innovation in next-generation mobile devices presents significant engineering challenges in antenna implementation. The key issue is that 5G phones typically have more than twice the RF path of ...; 兰博 RF/Wirelessly

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components