— Provides device-specific information to the system,
allowing host software to easily reconfigure for
different Flash devices
Sector Protection features
— A hardware method of locking a sector to prevent any
program or erase operations within that sector
— Sectors can be locked in-system or via programming
equipment
— Temporary Sector Unprotect feature allows code
changes in previously locked sectors
Erase Suspend/Erase Resume
— Suspends an erase operation to read data from, or
program data to, a sector that is not being erased,
then resumes the erase operation
Unlock Bypass Program Command
— Reduces overall programming time when issuing
multiple program command sequences
Data# Polling and toggle bits
— Provides a software method of detecting program or
erase operation completion
— Unlock Bypass Program Command
Reduces overall programming time when issuing
multiple program command sequences
Secured Silicon Sector
— 128-word sector for permanent, secure identification
through an 8-word random Electronic Serial Number
— May be programmed and locked at the factory or by
the customer
— Accessible through a command sequence
Hardware Features
Ready/Busy# pin (RY/BY#)
— Provides a hardware method of detecting program or
erase cycle completion
Compatibility with JEDEC standards
— Pinout and software compatible with single-power
supply Flash
— Superior inadvertent write protection
Hardware reset pin (RESET#)
— Hardware method to reset the device to reading array
data
Package Options
48-ball FBGA
48-pin TSOP
40-pin TSOP
WP#/ACC input pin
— Write protect (WP#) function allows protection of two
outermost boot sectors (boot sector models only),
regardless of sector protect status
— Acceleration (ACC) function provides accelerated
program times
Performance Characteristics
High performance
— Access times as fast as 70 ns
Publication Number
S29AL032D_00
Revision
A
Amendment
4
Issue Date
July 29, 2005
This document states the current technical specifications regarding the Spansion product(s) described herein. The Preliminary status of this document indicates that
product qualification has been completed, and that initial production has begun. Due to the phases of the manufacturing process that require maintaining efficiency and
quality, this document may be revised by subsequent versions or modifications due to changes in technical specifications.
P r e l i m i n a r y
General Description
The S29AL032D is a 32 megabit, 3.0 volt-only flash memory device, organized as 2,097,152
words of 16 bits each or 4,194,304 bytes of 8 bits each. Word mode data appears on DQ0-DQ15;
byte mode data appears on DQ0-DQ7. The device is designed to be programmed in-system with
the standard 3.0 volt VCC supply, and can also be programmed in standard EPROM programmers.
The device is available with access times as fast as 70 ns. The devices are offered in 40-pin TSOP,
48-pin TSOP and 48-ball FBGA packages. Standard control pins- chip enable (CE#), write enable
(WE#), and output enable (OE#)-control normal read and write operations, and avoid bus con-
tention issues.
The device requires only a
single 3.0 volt power supply
for both read and write functions. In-
ternally generated and regulated voltages are provided for the pro-gram and erase operations.
S29AL032D Features
The
Secured Silicon Sector
is an extra sector capable of being permanently locked by Spansion
or customers. The
Secured Silicon Indicator Bit
(DQ7) is permanently set to a 1 if the part is
factory locked,
and set to a 0 if customer lockable. This way, customer lockable parts can never
be used to replace a factory locked part.
Note that the S29AL032D has a Secured Silicon
Sector size of 128 words (256 bytes).
Factory locked parts provide several options. The Secured Silicon Sector may store a secure, ran-
dom 16 byte ESN (Electronic Serial Number), customer code (programmed through the Spansion
programming service), or both.
The S29AL032D is entirely command set compatible with the
JEDEC single-power-supply
Flash standard.
Commands are written to the command register using standard microprocessor
write timings. Register contents serve as input to an internal state-machine that controls the
erase and programming circuitry. Write cycles also internally latch addresses and data needed for
the programming and erase operations. Reading data out of the device is similar to reading from
other Flash or EPROM devices.
Device programming occurs by executing the program command sequence. This initiates the
Em-
bedded Program
algorithm—an internal algorithm that automatically times the program pulse
widths and verifies proper cell margin. The
Unlock Bypass
mode facilitates faster programming
times by requiring only two write cycles to program data instead of four.
Device erasure occurs by executing the erase command sequence. This initiates the
Embedded
Erase
algorithm—an internal algorithm that automatically preprograms the array (if it is not al-
ready programmed) before executing the erase operation. During erase, the device automatically
times the erase pulse widths and verifies proper cell margin.
The host system can detect whether a program or erase operation is complete by observing the
RY/BY# pin, or by reading the DQ7 (Data# Polling) and DQ6 (toggle)
status bits.
After a pro-
gram or erase cycle has been completed, the device is ready to read array data or accept another
command.
The
sector erase architecture
allows memory sectors to be erased and reprogrammed without
affecting the data contents of other sectors. The device is fully erased when shipped from the
factory.
Hardware data protection
measures include a low V
CC
detector that automatically inhibits write
operations during power transitions. The
hardware sector protection
feature disables both
program and erase operations in any combination of the sectors of memory. This can be achieved
in-system or via programming equipment.
2
S29AL032D
S29AL032D_00_A4 July 29, 2005
P r e l i m i n a r y
The
Erase Suspend/Erase Resume
feature enables the user to put erase on hold for any period
of time to read data from, or program data to, any sector that is not selected for erasure. True
background erase can thus be achieved.
The
hardware RESET# pin
terminates any operation in progress and resets the internal state
machine to reading array data. The RESET# pin may be tied to the system reset circuitry. A sys-
tem reset would thus also reset the device, enabling the system microprocessor to read the
boot-up firmware from the Flash memory.
The device offers two power-saving features. When addresses have been stable for a specified
amount of time, the device enters the
automatic sleep mode.
The system can also place the
device into the
standby mode.
Power consumption is greatly reduced in both these modes.
The Spansion Flash technology combines years of Flash memory manufacturing experience to
produce the highest levels of quality, reliability and cost effectiveness. The device electrically
erases all bits within a sector simultaneously via Fowler-Nordheim tunneling. The data is
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