Microcomputer Components
SAB 80515/SAB 80C515
8-Bit Single-Chip Microcontroller Family
User's Manual 08.95
SAB 80515 / SAB 80C515 Family
Revision History:
8.95
Previous Releases:
Page
30
39
80
105
106
109
137
152
243
301
12.90/10.92
Subjects (changes since last revision)
Modified timing diagram (PSEN rising edge)
More detailed description of ACMOS port structure
Differential output impedance of analog reference supply voltage now: 1 kΩ
Second paragraph: additional description; WDT reset information added
SWDT reset information added
Figure 7-51 corrected
Encoding of ADD A, direct corrected
Encoding of CPL bit corrected
New release of SAB 80C515 / SAB 80C535 data sheet inserted
New release of SAB 80515 / SAB 80535 data sheet inserted
Edition 08.95
Published by Siemens AG,
Bereich Halbleiter, Marketing-
Kommunikation, Balanstraße 73,
81541 München
©
Siemens AG 1995.
All Rights Reserved.
Attention please!
As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for applications, processes
and circuits implemented within components or assemblies.
The information describes the type of component and shall not be considered as assured characteristics.
Terms of delivery and rights to change design reserved.
For questions on technology, delivery and prices please contact the Semiconductor Group Offices in Germany or the Siemens Companies
and Representatives worldwide (see address list).
Due to technical requirements components may contain dangerous substances. For information on the types in question please contact
your nearest Siemens Office, Semiconductor Group.
Siemens AG is an approved CECC manufacturer.
Packing
Please use the recycling operators known to you. We can also help you – get in touch with your nearest sales office. By agreement we will
take packing material back, if it is sorted. You must bear the costs of transport.
For packing material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice you for any costs in-
curred.
Components used in life-support devices or systems must be expressly authorized for such purpose!
Critical components
1
of the Semiconductor Group of Siemens AG, may only be used in life-support devices or systems
2
with the express
written approval of the Semiconductor Group of Siemens AG.
1 A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the
failure of that life-support device or system, or to affect its safety or effectiveness of that device or system.
2 Life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sustain hu-
man life. If they fail, it is reasonable to assume that the health of the user may be endangered.
Contents
Contents
1
2
2.1
2.1.1
2.1.2
2.1.3
2.1.4
2.1.5
2.1.6
2.1.7
3
3.1
3.2
4
4.1
4.2
4.3
4.4
5
5.1
5.2
5.3
5.4
6
6.1
6.1.1
6.1.2
7
7.1
7.1.1
7.1.1.1
7.1.1.2
7.1.1.3
7.1.2
7.1.3
7.1.4
7.1.4.1
Page
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Fundamental Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Differences between MYMOS (SAB 80515/80535) and
ACMOS (SAB 80C515/80C535) Versions . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Power Saving Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Special Function Register PCON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Port Driver Circuitries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
The A/D Converter Input Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
A/D Converter Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
The Oscillator and Clock Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
The
V
BB
Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Central Processing Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
CPU Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Memory Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Program Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Data Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
General Purpose Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Special Function Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
External Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
Accessing External Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
PSEN, Program Store Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
ALE, Address Latch Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
Overlapping External Data and Program Memory Spaces . . . . . . . . . . . . . .29
System Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
Hardware Reset and Power-Up Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
Reset Function and Circuitries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
Hardware Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
On-Chip Peripheral Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Parallel I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Port Structures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Digital I/O Port Circuitry (MYMOS/ACMOS) . . . . . . . . . . . . . . . . . . . . . . . . .36
MYMOS Port Driver Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
ACMOS Port Driver Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
Port 0 and Port 2 Used as Address/Data Bus . . . . . . . . . . . . . . . . . . . . . . . .41
Alternate Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
Port Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44
Port Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44
3
Semiconductor Group
Contents
Contents
7.1.4.2
7.1.4.3
7.2
7.2.1
7.2.2
7.2.3
7.2.4
7.2.4.1
7.2.4.2
7.2.4.3
7.2.4.4
7.3
7.3.1
7.3.2
7.3.3
7.3.4
7.4
7.4.1
7.4.1.1
7.4.1.2
7.4.2
7.4.3
7.5
7.5.1
7.5.2
7.5.2.1
7.5.2.2
7.5.2.3
7.5.3
7.6
7.6.1
7.6.1.1
7.6.2
7.6.2.1
7.6.2.2
7.7
Page
Port Loading and Interfacing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45
Read-Modify-Write Feature of Ports 0 through 5 . . . . . . . . . . . . . . . . . . . . . .45
Serial Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47
Operating Modes of Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47
Multiprocessor Communication Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . .50
Baud Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50
Detailed Description of the Operating Modes . . . . . . . . . . . . . . . . . . . . . . . .54
Mode 0, Synchronous Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54
Mode 1, 8-Bit UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55
Mode 2, 9-Bit UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57
Mode 3, 9-Bit UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57
Timer 0 and Timer 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65
Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68
Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69
Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .70
Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71
A/D Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .72
Function and Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .74
lnitialization and Input Channel Selection . . . . . . . . . . . . . . . . . . . . . . . . . . .74
Start of Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75
Reference Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76
A/D Converter Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .80
Timer 2 with Additional Compare/Capture/Reload . . . . . . . . . . . . . . . . . . . . .82
Timer 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .85
Compare Function of Registers CRC, CC1 to CC3 . . . . . . . . . . . . . . . . . . . .88
Compare Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .88
Compare Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .92
Using Interrupts in Combination with the Compare Function . . . . . . . . . . . . .94
Capture Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .96
Power Saving Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .98
Power Saving Modes of the SAB 80515/80535 . . . . . . . . . . . . . . . . . . . . . . .99
Power-Down Mode of the SAB 80515/80535 . . . . . . . . . . . . . . . . . . . . . . . .99
Power Saving Modes of the SAB 80515/80535 . . . . . . . . . . . . . . . . . . . . . .100
Power-Down Mode of the SAB 80C515/80C535 . . . . . . . . . . . . . . . . . . . . .101
Idle Mode of the SAB 80C515/80C535 . . . . . . . . . . . . . . . . . . . . . . . . . . . .102
Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .105
Semiconductor Group
4
Contents
Contents
7.8
7.8.1
7.8.2
7.8.2.1
7.8.2.2
7.9
8
8.1
8.2
8.3
8.4
8.5
9
9.1
9.2
9.2.1
9.2.2
9.2.3
9.2.4
9.3
10
Page
Oscillator and Clock Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .107
Crystal Oscillator Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .107
Driving for External Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .107
Driving the SAB 80515/80535 from External Source . . . . . . . . . . . . . . . . . .108
Driving the SAB 80C515/80C535 from External Source . . . . . . . . . . . . . . .109
System Clock Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .110
Interrupt System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .112
Interrupt Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .112
Priority Level Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .120
How Interrupts are Handled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .122
External Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .125
Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .126
Instruction Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .127
Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .127
Introduction to the Instruction Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .129
Data Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .129
Arithmetic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .130
Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .132
Control Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .132
Instruction Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .134
Device Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .214
Semiconductor Group
5
京公网安备 11010802033920号
EEWORLD
