21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI49FCT32806
3.3V, 2 x 1:5 CMOS Clock Driver
Features
•
•
•
•
•
•
•
•
•
Low output skew: <270ps
Switching frequency of 133 MHz
Fast output rise/fall time <1.5ns
Low propagation delay <3.0ns
Low input capacitance <6.0pF
Balanced CMOS outputs
Industrial Temperature: –40°C to +85°C
3.3V ±10% operation
Packaging (Pb-free & Green available):
– 20-pin 300-mil wide SOIC (S)
– 20-pin 150-mil wide QSOP (Q)
– 20-pin 209-mil wide SSOP (H)
Description
Pericom Semiconductor’s PI49FCT32806 are inverting drivers. The
outputs are configured into 2 groups of 1-in, 5-out with independent
output enable. Group B has an extra MON output. Excellent output
signals to power and ground ratio minimize power and ground noise,
and also improves output performance.
PI49FCT32806 integrate series damping resistors on all outputs.
Block Diagram
OE
A
5
IN
A
OA
0–4
Pin Configuration
VCCA
OA0
OA1
OA2
5
GNDA
OB
0–4
IN
B
OE
B
OA3
OA4
GNDQ
OEA
MON
INA
1
2
3
4
20-Pin
5
H,Q,S
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCCB
OB0
OB1
OB2
GNDB
OB3
OB4
MON
OEB
INB
Pin Description
Pin Name
OE
A,
OE
B
IN
A,
IN
B
OA
N,
OB
N
MON
GND
V
CC
Description
Hi-Z State Output Enable Inputs (Active LOW)
Clock Inputs
Clock Outputs
Monitor Output
Ground
Power
Truth Table
(1)
Inputs
OE
A
, OE
B
L
L
H
H
IN
A
, IN
B
L
H
L
H
Outputs
OA
N
, OB
N
MON
H
H
L
L
Z
H
Z
L
Note:
1. H = High Voltage Level
Z = High Impedance
L = Low Voltage Level
1
PS8495A
09/28/04
PI49FCT32806
3.3V, 2 x 1:5 CMOS Clock Driver
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
Capacitance
(T
A
= 25°C, f = 1 MHz)
Parameters
(1)
C
IN
C
OUT
Description
Test Conditions
V
IN
= 0V
V
OUT
= 0V
Typ
3.0
–
Max.
4
6
Units
pF
pF
Input Capacitance
Output Capacitance
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ............................................................ –65°C to +150°C
Ambient Temperature with Power Applied ........................... –40°C to +85°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) ...... –0.5V to +4.6V
Supply Voltage to Ground Potential (Outputs & I/O Only) .... –0.5V to +4.6V
DC Input Voltage .................................................................... –0.5V to +4.6V
DC Output Current .............................................................................. 120mA
Power Dissipation ................................................................................. 0.5W
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation
of the device at these or any other conditions above
those indicated in the operational sections of this
specification is not implied. Exposure to absolute maxi-
mum rating conditions for extended periods may affect
reliability.
Operating Range
Ambient Temperature = –40°C to +85°C, V
CC
= 3.3V ± 0.3V
DC Electrical Characteristics
(Over the Operating Range)
Symbol
V
O H
De s cription
V
C C
= min.
V
IN
= V
IL
or V
IH
Output high voltage
Output low voltage
V
C C
= min.
V
IN
= V
IL
or V
IH
Input high voltage
Input low voltage
Input high current
Input low current
High impedance
output current
Clamp diode voltage
Output HIGH
(4)
current
Output LOW
(4)
current
Short circuit
(5)
current
Internal series resistor
Te s t Conditions
(1)
I
O H
= –8mA
M in.
2 . 4
(3 )
Typ.
(2)
3.0
M ax.
–
Units
V
O L
I
OL
= 12mA
LOW logic
HIGH logic
V
C C
= 3.6V, V
IN
= 3.6V
V
C C
= 3.6V, V
IN
= 0V
V
C C
= 3.6V all
outputs disabled
V
C C
= min., I
IN
= –18mA
V
O UT
= 1.5V, V
IN
= V
IL
or V
IH
V
C C
= 3.3V
V
O UT
= 1.5V, V
IN
= V
IL
or V
IH
V
C C
= 3.3V
V
C C
= max.
V
O UT
= GND
V
O UT
= V
C C
V
O UT
= GND
–
2.0
–0.5
–
–
–
–
–
–25
25
–50
0.4
–
–
–
–
–
–
–0.7
–45
45
–100
22
0.5
Vcc- 0.2
0.8
1
–1
1
–1
–1.2
–80
90
–180
V
V
IH
V
IL
I
IH
I
IL
I
O ZH
I
O ZL
V
IK
I
OH
I
OL
I
O S
R
S
µA
V
mA
Ohm
(Please see page 3 for Notes.)
2
PS8495A
09/28/04
PI49FCT32806
3.3V, 2 x 1:5 CMOS Clock Driver
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25°C ambient and maximum loading.
3. V
OH
= V
CC
– 0.6V at rated current.
4. This parameter is determined by device characterization but is not production tested.
5. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
Power Supply Characteristics
Parameters Description
I
CC
DI
CC
I
CCD
Quiescent Power
Supply Current
Supply Current per
Inputs @ TTL HIGH
Supply Current per
Input per MHz
(4)
V
CC
= Max.
V
CC
= Max.
V
CC
= Max.,
Outputs Open
OE
A
or OE
B
= GND
Per Output Toggling
50% Duty Cycle
V
CC
= Max.,
Outputs Open
f
O
= 10 MH
Z
50% Duty Cycle
OE
A
or OE
B
= GND
Mon. Outputs Toggling
V
CC
= Max.,
Outputs Open
f
O
= 2.5 MH
Z
50% Duty Cycle
OE
A
or OE
B
= GND
Eleven Outputs Toggling
Test Conditions
(1)
V
IN
= GND or V
CC
V
IN
= V
CC
– 0.6V
(3)
V
IN
= V
CC
V
IN
= GND
Min.
—
—
—
Typ
(2)
3
15.0
0.08
Max.
30
300
0.16
Units
µA
µA
mA/
MH
Z
I
C
V
IN
= V
CC
V
IN
= GND
V
IN
= V
CC
– 0.6V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= V
CC
– 0.6V
V
IN
= GND
—
—
3.3
3.3
9.0
(5)
10.0
(5)
mA
—
—
1.8
1.8
6.0
(5)
7.0
(5)
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at V
CC
= 3.3V, +25°C ambient.
3. Per TTL driven input (V
IN
= V
CC
– 0.6V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
C
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
O
N
O
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= V
CC
– 0.6V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
O
= Output Frequency
N
O
= Number of Outputs at f
O
All currents are in milliamps and all frequencies are in megahertz.
3
PS8495A
09/28/04
PI49FCT32806
3.3V, 2 x 1:5 CMOS Clock Driver
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
Switching Characteristics over Operating Range
Symbol
De s cription
Propagation Delay
A to Bn
(4)
Rise/Fall Time
(2)
0.5V - 2.0V
Pulse Skew
(2)
Output
Skew
(2)
Condition
15pF
M ax.
(2)
Units
3.0
Switch Position
Test
Disable LOW
Enable LOW
Disable HIGH
Enable HIGH
All Other Inputs
Switch
6V
GND
Open
t
PLH
t
PHL
t
R/
t
F
t
S K (p)
t
S K (o)
t
S K (t)
15pF
Same Output
Same
Package,
Same Bank
Same Device,
Same Bank
C
L
= 15pF
C
L
= 15pF
1. 5
0.7
0.27
ns
Definitions:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
Package Skew
(2)
0.55
5.2
133
MHz
t
ZL
, t
ZH,
Enable/Disable
t
LZ
, t
HZ
Time
F
M AX
Input Frequency
Note:
1. Lumped load, C
L
= 15pF
2. These parameters are guaranteed by design
3. Minimum propagation delay of 1.5ns is guaranteed but not tested.
Tests Circuit for F
IN
>100 MHz
(2)
Tests Circuit for Enable/Disable Time
+6.0V
V
CC
V
CC
Pulse
Generator
f = 125MHz
R
T
500Ω
D.U.T.
C
L= 15pF
Pulse
Generator
f = 10MHz
R
T
D.U.T.
C
L
15pF
500Ω
R
T
=
Termination resistance – should be equal to Z
OUT
of the
pulse generator
4
PS8495A
09/28/04
PI49FCT32806
3.3V, 2 x 1:5 CMOS Clock Driver
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
Switching Waveforms
Propagation Delay
Output Skew – t
SK
(o)
3V
3V
Input
tPLHx
Ox
tSK(o)
tSK(o)
Input
t
PLH
Output
t
PHL
1.5V
0V
V
OH
1.5V
V
OL
1.5V
0V
tPHLx
VOH
1.5V
VOL
VOH
Oy
1.5V
tPLHy
VOL
tPHLy
Enable and Disable Times
Enable
OE
t
PZL
Output
Normally
Low
Output
Normally
High
Switch
Closed
t
PZH
Switch
Open
1.5V
0V
0V
3.0V
1.5V
0.3V
t
PHZ
0.3V
V
OL
V
OH
Output
Disable
3V
1.5V
0V
3.0V
Input
tSK(o) = | tPLHy – tPLHx | or | tPHLy – tPHLx |
Pulse Skew – t
SK
(p)
3V
1.5V
0V
tPLH
tPHL
VOH
1.5V
VOL
tSK(p) = | tPHL – tPLH |
t
PLZ
Package Skew – t
SK
(t)
3V
Input
tPLH1
Package 1
Output
tSK(t)
tSK(t)
1.5V
0V
tPHL1
VOH
1.5V
VOL
VOH
Package 2
Output
tPLH2
1.5V
VOL
tPHL2
tSK(t) = | tPLH2 – tPLH1 | or | tPHL2 – tPHL1 |
5
PS8495A
09/28/04
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