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PDU-54-500

Description
ACTIVE DELAY LINE, TRUE OUTPUT, PDIP24, DIP-24
Categorylogic    logic   
File Size88KB,1 Pages
ManufacturerData Delay Devices
Environmental Compliance  
Download Datasheet Parametric View All

PDU-54-500 Overview

ACTIVE DELAY LINE, TRUE OUTPUT, PDIP24, DIP-24

PDU-54-500 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerData Delay Devices
Parts packaging codeDIP
package instructionDIP,
Contacts24
Reach Compliance Codecompliant
Other featuresINPUT RISE TIME 1NS
series100K
Input frequency maximum value (fmax)125 MHz
JESD-30 codeR-PDIP-T24
JESD-609 codee3
length32.258 mm
Logic integrated circuit typeACTIVE DELAY LINE
Number of functions1
Number of taps/steps15
Number of terminals24
Maximum operating temperature85 °C
Minimum operating temperature
Output characteristicsOPEN-EMITTER
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Maximum supply current (ICC)300 mA
programmable delay lineYES
Certification statusNot Qualified
Maximum seat height10.033 mm
surface mountNO
technologyECL
Temperature levelOTHER
Terminal surfaceTIN
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Total delay nominal (td)10.8 ns
width15.24 mm
This Material Copyrighted By Its Respective Manufacturer
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